Satyajit Bora

According to our database, Satyajit Bora authored at least 4 papers between 2016 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2022

Design and Implementation of Adaptive Binary Divider for Fixed-Point and Floating-Point Numbers.

Satyajit Bora, Roy Paily

Circuits Syst. Signal Process., 2022

2021

A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications.

Satyajit Bora, Roy Paily

IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020

An Efficient Architecture for QRS Detection in FPGA Using Integer Haar Wavelet Transform.

Soham Talukder, Rajan Singh, Satyajit Bora, Roy Paily

Circuits Syst. Signal Process., 2020

2016

Design and Implementation of Blind Assistance System Using Real Time Stereo Vision Algorithms.

Vaddi Chandra Sekhar, Satyajit Bora, Monalisa Dash, Manchi Pavan Kumar, S. Josephine, Roy Paily

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016