Satvik Maurya

According to our database, Satvik Maurya authored at least 7 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Managing Classical Processing Requirements for Quantum Error Correction.

Satvik Maurya, Swamit Tannu

CoRR, 2024

Enabling Leakage Reduction via Fast and High-Fidelity Qutrit Readout.

Chaithanya Naik Mude, Satvik Maurya, Benjamin Lienhard, Swamit Tannu

CoRR, 2024

Understanding Side-Channel Vulnerabilities in Superconducting Qubit Readout Architectures.

Satvik Maurya, Chaithanya Naik Mude, Benjamin Lienhard, Swamit Tannu

CoRR, 2024

2023

Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures.

Satvik Maurya, Chaithanya Naik Mude, William D. Oliver, Benjamin Lienhard, Swamit S. Tannu

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022

Hardware Efficient Neural Network Assisted Qubit Readout.

Satvik Maurya, Chaithanya Naik Mude, William D. Oliver, Benjamin Lienhard, Swamit S. Tannu

CoRR, 2022

COMPAQT: Compressed Waveform Memory Architecture for Scalable Qubit Control.

Satvik Maurya, Swamit S. Tannu

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2019

Hardware/Software Co-Design of a High-Speed Othello Solver.

Pranav Gangwar, Satvik Maurya, Shubham Garg, Sakshi Goyal, Aditya S. Kumar, Preyesh Dalmia, Neeta Pandey

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019