Satoshi Takano

According to our database, Satoshi Takano authored at least 8 papers between 1990 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

4.6 A 1/2.3inch 20Mpixel 3-layer stacked CMOS Image Sensor with DRAM.

Tsutomu Haruta, Tsutomu Nakajima, Jun Hashizume, Taku Umebayashi, Hiroshi Takahashi, Kazuo Taniguchi, Masami Kuroda, Hiroshi Sumihiro, Koji Enoki, Takatsugu Yamasaki, Katsuya Ikezawa, Atsushi Kitahara, Masao Zen, Masafumi Oyama, Hiroki Koga, Hidenobu Tsugawa, Tomoharu Ogita, Takashi Nagano, Satoshi Takano, Tetsuo Nomoto

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2001

A Japanese TTS system based on multiform units and a speech modification algorithm with harmonics reconstruction.

Satoshi Takano, Kimihito Tanaka, Hideyuki Mizuno, Masanobu Abe, Shin'ya Nakajima

IEEE Trans. Speech Audio Process., 2001

Enabling End-users to Construct Data-intensive Web-sites from XML Repositories: An Example-based Approach.

Atsuyuki Morishima, Seiichi Koizumi, Hiroyuki Kitagawa, Satoshi Takano

Proceedings of the VLDB 2001, 2001

2000

A new Japanese TTS system based on speech-prosody database and speech modification.

Mitsuaki Isogai, Kimihito Tanaka, Satoshi Takano, Hideyuki Mizuno, Masanobu Abe, Shin'ya Nakajima

Proceedings of the Sixth International Conference on Spoken Language Processing, 2000

1999

A new F0 modification algorithm by manipulating harmonics of magnitude spectrum.

Satoshi Takano, Masanobu Abe

Proceedings of the Sixth European Conference on Speech Communication and Technology, 1999

1991

A 5-ns GaAs 16-kb SRAM.

Shuichi Matsue, Hiroshi Makino, Minoru Noda, Hirofumi Nakano, Satoshi Takano, Kazuo Nishitani, Shimpei Kayano

IEEE J. Solid State Circuits, October, 1991

A 7 ns 1 Mb BiCMOS ECL SRAM with shift redundancy.

Atsushi Ohba, Shigeki Ohbayashi, Toru Shiomi, Satoshi Takano, Kenji Anami, Hiroki Honda, Yoshiyuki Ishigaki, Masahiro Hatanaka, Shigeo Nagao, Shimpei Kayano

IEEE J. Solid State Circuits, April, 1991

1990

A 7-ns/850-mW GaAs 4-kb SRAM with little dependence on temperature.

Hiroshi Makino, Shuichi Matsue, Minoru Noda, Noriyuki Tanino, Satoshi Takano, Kazuo Nishitani, Shimpei Kayano

IEEE J. Solid State Circuits, October, 1990