Satomi Kusanagi

According to our database, Satomi Kusanagi authored at least 1 paper in 2004.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2004

PLL design technique by a loop-trajectory analysis taking decision-circuit phase margin into account for over-10-Gb/s clock and data recovery circuits.

Keiji Kishine, Kyoko Fujimoto, Satomi Kusanagi, Haruhiko Ichino

IEEE J. Solid State Circuits, 2004