Sascha Plazar

According to our database, Sascha Plazar authored at least 8 papers between 2007 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Memory-based optimization techniques for real-time systems.

Sascha Plazar

PhD thesis, 2012

WCET-aware static locking of instruction caches.

Sascha Plazar, Jan C. Kleinsorge, Peter Marwedel, Heiko Falk

Proceedings of the 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2012

2011

Approximating Pareto optimal compiler optimization sequences - a trade-off between WCET, ACET and code size.

Paul Lokuciejewski, Sascha Plazar, Heiko Falk, Peter Marwedel, Lothar Thiele

Softw. Pract. Exp., 2011

WCET-driven branch prediction aware code positioning.

Sascha Plazar, Jan C. Kleinsorge, Heiko Falk, Peter Marwedel

Proceedings of the 14th International Conference on Compilers, 2011

2010

WCET-Driven Cache-Aware Memory Content Selection.

Sascha Plazar, Paul Lokuciejewski, Peter Marwedel

Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010

Multi-objective Exploration of Compiler Optimizations for Real-Time Systems.

Paul Lokuciejewski, Sascha Plazar, Heiko Falk, Peter Marwedel, Lothar Thiele

Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010

2009

WCET-aware Software Based Cache Partitioning for Multi-Task Real-Time Systems.

Sascha Plazar, Paul Lokuciejewski, Peter Marwedel

Proceedings of the 9th Intl. Workshop on Worst-Case Execution Time Analysis, 2009

2007

Compile-time decided instruction cache locking using worst-case execution paths.

Heiko Falk, Sascha Plazar, Henrik Theiling

Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007