Sarwono Sutikno
Orcid: 0000-0002-7755-7240
According to our database1,
Sarwono Sutikno
authored at least 12 papers
between 1994 and 2023.
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Bibliography
2023
Detecting Unknown Hardware Trojans in Register Transfer Level Leveraging Verilog Conditional Branching Features.
IEEE Access, 2023
2022
Trust-Hub Trojan Benchmark for Hardware Trojan Detection Model Creation using Machine Learning.
Dataset, September, 2022
2021
Efficient Machine Learning Model for Hardware Trojan Detection on Register Transfer Level.
Proceedings of the 4th International Conference on Signal Processing and Information Security, 2021
2019
2018
Int. J. Netw. Secur., 2018
Int. J. Commun. Networks Inf. Secur., 2018
2010
CoRR, 2010
2009
Proceedings of the 8th IEEE/ACIS International Conference on Computer and Information Science, 2009
2002
VHDL design and simulation of MAM memory for LAPCAM parallel architecture for image processing.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1994
A Distributed Reconfiguration Controller for Linear Array Harvest Problem: Hierarchically Quasi-Normalized Neural Approach.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994