Sarthak Raina

According to our database, Sarthak Raina authored at least 2 papers between 2015 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range.

Keith A. Bowman, Sarthak Raina, Todd Bridges, Daniel Yingling, Hoan Nguyen, Brad Appel, Yesh Kolla, Jihoon Jeong, Francois Atallah, David Hansquine

IEEE J. Solid State Circuits, 2016

2015

8.5 A 16nm auto-calibrating dynamically adaptive clock distribution for maximizing supply-voltage-droop tolerance across a wide operating range.

Keith A. Bowman, Sarthak Raina, Todd Bridges, Daniel Yingling, Hoan Nguyen, Brad Appel, Yesh Kolla, Jihoon Jeong, Francois Atallah, David Hansquine

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015