Sarthak Kalani

Orcid: 0000-0001-8801-659X

According to our database1, Sarthak Kalani authored at least 8 papers between 2016 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Zero-Crossing-Time-Difference Model for Stability Analysis of VCO-Based OTAs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2019
Benefits of Using VCO-OTAs to Construct TIAs in Wideband Current-Mode Receivers Over Inverter-Based OTAs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators.
IEEE Access, 2019

2018
Using VCO-OTA TIAs to Break the Gain, Linearity and Power Consumption Trade-offs in Passive Mixer based Direct-Conversion Receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A 0.2V 492nW VCO-based OTA with 60kHz UGB and 207 μVrms noise.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Charge pump optimization and output spur reduction in VCO-based OTAs for active-RC analog filters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

3.7μW 0.8V VCO-integrator-based high-efficiency capacitor-free low-dropout voltage regulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016


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