Sarosij Adak

According to our database, Sarosij Adak authored at least 4 papers between 2014 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Performance enhancement of normally off InAlN/AlN/GaN HEMT using aluminium gallium nitride back barrier.

Nisarga Chand, Sarosij Adak, Sanjit Kumar Swain, Sudhansu Mohan Biswal, Angsuman Sarkar

Comput. Electr. Eng., 2022

2016

Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs.

Sanjit Kumar Swain, Arka Dutta, Sarosij Adak, Sudhansu Kumar Pati, Chandan Kumar Sarkar

Microelectron. Reliab., 2016

2015

Effect of Channel Thickness and Doping Concentration on Sub-Threshold Performance of Graded Channel and Gate Stack DG MOSFETs.

Sanjit Kumar Swain, Sarosij Adak, Bikash Sharma, Sudhansu Kumar Pati, Chandan Kumar Sarkar

J. Low Power Electron., 2015

2014

Analysis of flicker and thermal noise in p-channel Underlap DG FinFET.

Sanjit Kumar Swain, Sarosij Adak, Sudhansu Kumar Pati, Hemant Pardeshi, Chandan Kumar Sarkar

Microelectron. Reliab., 2014