Saravanan Rajapandian

According to our database, Saravanan Rajapandian authored at least 6 papers between 2003 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

2.5 A high-efficiency multiband Class-F power amplifier in 0.153µm bulk CMOS for WCDMA/LTE applications.

Jenwei Ko, Xiaochuan Guo, Changhua Cao, Saravanan Rajapandian, Solti Peng, Jing Li, Wenchang Lee, Narayanan Baskaran, Caiyi Wang

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2007

High Voltage Tolerant Linear Regulator With Fast Digital Control for Biasing of Integrated DC-DC Converters.

Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik

IEEE J. Solid State Circuits, 2007

2006

High-voltage power delivery through charge recycling.

Saravanan Rajapandian, Kenneth L. Shepard, Peter Hazucha, Tanay Karnik

IEEE J. Solid State Circuits, 2006

A Linear Regulator with Fast Digital Control for Biasing Integrated DC-DC Converters.

Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

Implicit DC-DC downconversion through charge-recycling.

Saravanan Rajapandian, Zheng Xu, Kenneth L. Shepard

IEEE J. Solid State Circuits, 2005

2003

Charge-Recycling Voltage Domains for Energy-Efficient Low-Voltage Operation of Digital CMOS Circuits.

Saravanan Rajapandian, Zheng Xu, Kenneth L. Shepard

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003