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Sarath Makala

According to our database1, Sarath Makala authored at least 2 papers in 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2019
A Low-Latency 16-Phase Pulse Width Modulator with Phase Angle Control for 140MHz Fully Integrated Voltage Regulators on 22nm Tri-Gate CMOS.
[BibTeX]
[DOI]
Gerhard Schrom
,
Sarath Makala
,
Ravi Sankar Vunnam
,
Raghuraman Narayanan
,
Fabrice Paillet
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Efficiency Measurement Method for Fully Integrated Voltage Regulators used in 4<sup>th</sup> and 5<sup>th</sup> Generation Intel® Core™ Microprocessors.
[BibTeX]
[DOI]
Gerhard Schrom
,
Michael J. Hill
,
Sarath Makala
,
Ravi Sankar Vunnam
,
Arun Krishnamoorthy
,
Ryan Ferguson
Proceedings of the IEEE International Test Conference, 2019


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