Saransh Sharma

According to our database, Saransh Sharma authored at least 7 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

FiRST: Finetuning Router-Selective Transformers for Input-Adaptive Latency Reduction.

Akriti Jain, Saransh Sharma, Koyel Mukherjee, Soumyabrata Pal

CoRR, 2024

2023

A 65-nm CMOS Fluorescence Sensor for Dynamic Monitoring of Living Cells.

Fatemeh Aghlmand, Chelsea Hu, Saransh Sharma, Krishna K. Pochana, Richard M. Murray, Azita Emami

IEEE J. Solid State Circuits, November, 2023

A 65nm CMOS Living-Cell Dynamic Fluorescence Sensor with 1.05fA Sensitivity at 600/700nm Wavelengths.

Fatemeh Aghimand, Chelsea Hu, Saransh Sharma, Krishna K. Pochana, Richard M. Murray, Azita Emami

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Monolithic 3D Magnetic Sensor in 65nm CMOS with rms Noise and 14.8μW Power.

Saransh Sharma, Hayward Melton, Liliana Edmonds, Olivia Addington, Mikhail G. Shapiro, Azita Emami

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2021

Wireless 3D Surgical Navigation and Tracking System With 100μm Accuracy Using Magnetic-Field Gradient-Based Localization.

Saransh Sharma, Aditya Telikicherla, Grace Ding, Fatemeh Aghlmand, Arian Hashemi Talkhooncheh, Mikhail G. Shapiro, Azita Emami

IEEE Trans. Medical Imaging, 2021

2020

20.4 3D Surgical Alignment with 100µm Resolution Using Magnetic-Field Gradient-Based Localization.

Saransh Sharma, Grace Ding, Aditya Telikicherla, Fatemeh Aghlmand, Arian Hashemi Talkhooncheh, Minwo Wang, Mikhail G. Shapiro, Azita Emami

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2017

Ultra Low Power Sensor Node for Security Applications, Facilitated by Algorithm-Architecture Co-design.

Saransh Sharma, Avilash Mukherjee, Abhishek Dongre, Mrigank Sharad

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017