Saransh Gupta
Orcid: 0000-0001-5814-3934
According to our database1,
Saransh Gupta
authored at least 49 papers
between 2017 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
ACM Trans. Embed. Comput. Syst., March, 2024
2023
ClotCatcher: a novel natural language model to accurately adjudicate venous thromboembolism from radiology reports.
BMC Medical Informatics Decis. Mak., December, 2023
RAPIDx: High-Performance ReRAM Processing In-Memory Accelerator for Sequence Alignment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023
CoRR, 2023
Sparsity Controllable Hyperdimensional Computing for Genome Sequence Matching Acceleration.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Enhanced Heart Disease Classification Using Parallelization and Integrated Machine-Learning Techniques.
Proceedings of the Computer Vision and Image Processing - 8th International Conference, 2023
2022
Integrative Network Modeling Highlights the Crucial Roles of Rho-GDI Signaling Pathway in the Progression of non-Small Cell Lung Cancer.
IEEE J. Biomed. Health Informatics, 2022
Store-n-Learn: Classification and Clustering with Hyperdimensional Computing across Flash Hierarchy.
ACM Trans. Embed. Comput. Syst., 2022
ACM J. Emerg. Technol. Comput. Syst., 2022
HDnn-PIM: Efficient in Memory Design of Hyperdimensional Computing with Feature Extraction.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Massively Parallel Big Data Classification on a Programmable Processing In-Memory Architecture.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
DP-Sim: A Full-stack Simulation Infrastructure for Digital Processing In-Memory Architectures.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
PIM-DL: Boosting DNN Inference on Digital Processing In-Memory Architectures via Data Layout Optimizations.
Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IACR Cryptol. ePrint Arch., 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020
DUAL: Acceleration of Clustering Algorithms using Digital-based Processing In-Memory.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
SCRIMP: A General Stochastic Computing Architecture using ReRAM in-Memory Processing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IEEE Trans. Computers, 2019
ACM J. Emerg. Technol. Comput. Syst., 2019
Digital-based processing in-memory: a highly-parallel accelerator for data intensive applications.
Proceedings of the International Symposium on Memory Systems, 2019
MAPIM: Mat Parallelism for High Performance Processing in Non-volatile Memory Architecture.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
FloatPIM: in-memory acceleration of deep neural network training with high precision.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017