Sarah Verhaeren

According to our database1, Sarah Verhaeren authored at least 3 papers between 2009 and 2014.

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Bibliography

2014
22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2010
A 3.2GHz-sample-rate 800mHz bandwidth highly reconfigurable analog FIR filter in 45nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Product On-Chip Process Compensation for Low Power and Yield Enhancement.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009


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