Sarada Musala

According to our database1, Sarada Musala authored at least 11 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
High-speed low power energy efficient 1- trit multiplier with less number of CNTFETs.
Multim. Tools Appl., 2024

FPGA Implementation of Energy Efficient Approximate Hybrid Parallel Prefix Adders for Image Processing Applications.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

Design of Comparator and Binary Amplitude Shift Keying Modulator using CCCII.
Proceedings of the 16th International Conference on Electronics, 2024

2023
Modified Low Power High Speed Approximate Adders For Energy Efficient Arithmetic Applications.
Proceedings of the 15th International Conference on Electronics, 2023

2022
Ultra-Low-Power Modulo Adder with Thermometer Coding for Uncertain RNS Applications.
J. Uncertain Syst., 2022

A Novel 2:1 Multiplexer Based Quaternary Full Adder.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Design of CNTFET based Ternary Subtractor using Unary Operators.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021
Novel Modular Adder Based on Thermometer Coding for Residue Number Systems Applications.
Proceedings of the 13th International Conference on Electronics, 2021

2020
Low Power High Speed Body Driven Comparator for Implantable Electronics.
Proceedings of the International SoC Design Conference, 2020

2018
Voltage Difference Transconductance Amplifier based Voltage Mode Band Pass Filter with constant Q-Factor.
Proceedings of the 2018 10th International Conference on Electronics, 2018

A Voltage Mode All Pass Filter Employing Voltage Difference Transconductance Amplifier.
Proceedings of the 2018 10th International Conference on Electronics, 2018


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