Santiago Sánchez-Solano
Orcid: 0000-0002-0700-0447
According to our database1,
Santiago Sánchez-Solano
authored at least 65 papers
between 1995 and 2024.
Collaborative distances:
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Bibliography
2024
Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management.
Sensors, September, 2024
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024
2023
Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems.
Cryptogr., June, 2023
On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices.
Sensors, 2023
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
2022
Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems.
Sensors, 2022
Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems.
Cryptogr., 2022
Embedded system implementation of an evolutionary algorithm for circle detection on programmable devices.
Comput. Electr. Eng., 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm.
ACM J. Emerg. Technol. Comput. Syst., 2021
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2019
Int. J. Parallel Program., 2019
2017
J. Cryptogr. Eng., 2017
Side-channel analysis of the modular inversion step in the RSA key generation algorithm.
Int. J. Circuit Theory Appl., 2017
2016
Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems.
J. Real Time Image Process., 2016
2015
Hardware/software co-design of video processing applications on a reconfigurable platform.
Proceedings of the IEEE International Conference on Industrial Technology, 2015
Hardware implementation of a background substraction algorithm in FPGA-based platforms.
Proceedings of the IEEE International Conference on Industrial Technology, 2015
2014
IEEE Trans. Consumer Electron., 2014
2013
IEEE Trans. Ind. Informatics, 2013
IEEE Trans. Ind. Informatics, 2013
Proceedings of the Fuzzy Logic and Applications - 10th International Workshop, 2013
2012
Enabling fuzzy technologies in high performance networking via an open FPGA-based development platform.
Appl. Soft Comput., 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the FUZZ-IEEE 2012, 2012
2011
IEEE J. Sel. Top. Signal Process., 2011
Fuzzy motion adaptive algorithm and its hardware implementation for video de-interlacing.
Appl. Soft Comput., 2011
Proceedings of the 11th International Conference on Intelligent Systems Design and Applications, 2011
2010
An automated design flow from linguistic models to piecewise polynomial digital circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Hardware-software Codesign of Fuzzy Control Systems using FPGAs.
Proceedings of the ICINCO 2010, 2010
Proceedings of the FUZZ-IEEE 2010, 2010
Proceedings of the FUZZ-IEEE 2010, 2010
Studies in Fuzziness and Soft Computing 246, Springer, ISBN: 978-3-642-10694-1, 2010
2009
Fuzzy Motion-Adaptive Interpolation With Picture Repetition Detection for Deinterlacing.
IEEE Trans. Instrum. Meas., 2009
2008
Proceedings of the FUZZ-IEEE 2008, 2008
2007
IEEE Trans. Ind. Electron., 2007
Erratum to "Automatic tuning of complex fuzzy systems with Xfuzzy": [Fuzzy Sets and System 158 (2007) 2026-2038].
Fuzzy Sets Syst., 2007
Fuzzy Sets Syst., 2007
Proceedings of the FUZZ-IEEE 2007, 2007
2006
Int. J. Approx. Reason., 2006
Proceedings of the Knowledge-Based Intelligent Information and Engineering Systems, 2006
Proceedings of the IEEE International Conference on Fuzzy Systems, 2006
Development of IP Modules of Fuzzy Controllers for the Design of Embedded Systems on FPGAs.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
2005
Proceedings of the Neural Nets, 16th Italian Workshop on Neural Nets, 2005
Proceedings of the Joint 4th Conference of the European Society for Fuzzy Logic and Technology and the 11th Rencontres Francophones sur la Logique Floue et ses Applications, 2005
2004
IEEE Trans. Fuzzy Syst., 2004
Appl. Soft Comput., 2004
Proceedings of the IEEE International Conference on Fuzzy Systems, 2004
2003
Proceedings of the Fuzzy Logic and Applications, 5th International Workshop, 2003
Proceedings of the 12th IEEE International Conference on Fuzzy Systems, 2003
Proceedings of the 12th IEEE International Conference on Fuzzy Systems, 2003
2002
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Proceedings of the 2002 IEEE International Conference on Fuzzy Systems, 2002
2001
Proceedings of the 2nd International Conference in Fuzzy Logic and Technology, 2001
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 1998 Design, 1998
1997
IEEE Trans. Fuzzy Syst., 1997
1996
IEEE J. Solid State Circuits, 1996
1995
IEEE Trans. Computers, 1995
Proceedings of the Proceedings EURO-DAC'95, 1995