Santiago González Pestana

According to our database, Santiago González Pestana authored at least 5 papers between 2002 and 2006.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2006

An Integrated, Low-Power Processor for Image Signal Processing.

Edwin van Dalen, Santiago González Pestana, Antoine van Wel

Proceedings of the Eigth IEEE International Symposium on Multimedia (ISM 2006), 2006

2005

An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration.

Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees Goossens

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification.

Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema

Proceedings of the 2005 Design, 2005

2004

Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach.

Santiago González Pestana, Edwin Rijpkema, Andrei Radulescu, Kees Goossens, Om Prakash Gangwal

Proceedings of the 2004 Design, 2004

2002

Hand shape identification using neural networks.

Karen O. Egiazarian, Santiago González Pestana

Proceedings of the Image Processing: Algorithms and Systems, 2002