Santanu Dutta

According to our database, Santanu Dutta authored at least 30 papers between 1989 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Adaptive Beamforming for Mobile Satellite Systems Based on User Location/Waveform.

Dunmin Zheng, Santanu Dutta

Proceedings of the 90th IEEE Vehicular Technology Conference, 2019

2018

Nonparametric estimation of 100(1 - p)% expected shortfall: p → 0 as sample size is increased.

Santanu Dutta, Suparna Biswas

Commun. Stat. Simul. Comput., 2018

2017

Extreme quantile estimation based on financial time series.

Santanu Dutta, Suparna Biswas

Commun. Stat. Simul. Comput., 2017

2016

Cross-validation Revisited.

Santanu Dutta

Commun. Stat. Simul. Comput., 2016

2015

Local Smoothing for Kernel Distribution Function Estimation.

Santanu Dutta

Commun. Stat. Simul. Comput., 2015

2014

Local Smoothing Using the Bootstrap.

Santanu Dutta

Commun. Stat. Simul. Comput., 2014

2013

Robustness of designs for model discrimination.

Subir Ghosh, Santanu Dutta

J. Multivar. Anal., 2013

2009

S-WiMAX: adaptation of IEEE 802.16e for mobile satellite services.

Arif Ansari, Santanu Dutta, Michael Tseytlin

IEEE Commun. Mag., 2009

2007

Recent Trends in the Design of Video Signal Processing IPS and Multimedia SoCs.

Santanu Dutta

Proceedings of the SECRYPT 2007, 2007

Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution.

Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi, Santanu Dutta

Proceedings of the 44th Design Automation Conference, 2007

2005

Design of Multimillion-Gate Multimedia SoCs: Where do we stand?

Santanu Dutta

Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005

2003

Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems.

Santanu Dutta

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

2001

Architecture and design of NX-2700: a programmable single-chip HDTV all-format-decode-and-display processor.

Santanu Dutta

IEEE Trans. Very Large Scale Integr. Syst., 2001

Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems.

Santanu Dutta, Rune Jensen, Alf Rieckmann

IEEE Des. Test Comput., 2001

Design verification of an 18-million-transistor digital television and media processor chip.

Santanu Dutta

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000

Architecture and Implementation of a High-Definition Video Co-Processor for Digital Television Applications.

Santanu Dutta, Deepak Singh, Essam Abu-Ghoush, Vijay Mehra

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip.

Santanu Dutta

Proceedings of the Integrated Circuit Design, 2000

1999

A circuit-driven design methodology for video signal-processing datapath elements.

Santanu Dutta, Wayne H. Wolf

IEEE Trans. Very Large Scale Integr. Syst., 1999

Architecture and design of a Talisman-compatible multimedia processor.

Santanu Dutta, Vijay Mehra, Weiwen Zhu, Deepak Singh, Marcel Janssens, Ramakrishna Vengalasetti, Boaz Ben-Nun, Pardha Pothana, Venkat Adusumilli, Nahid King, John Yen-Han Huang, Lie Ling, Chris Nelson, Jai Bannur, Sarah Wu

IEEE Trans. Circuits Syst. Video Technol., 1999

1998

A methodology to evaluate memory architecture design tradeoffs for video signal processors.

Santanu Dutta, Wayne H. Wolf, Andrew Wolfe

IEEE Trans. Circuits Syst. Video Technol., 1998

A design study of a 0.25-μm video signal processor.

Santanu Dutta, Kevin J. O'Connor, Wayne H. Wolf, Andrew Wolfe

IEEE Trans. Circuits Syst. Video Technol., 1998

1997

Datapath Design for a VLIW Video Signal Processor.

Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. T. Fernandes

Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

1996

A flexible parallel architecture adapted to block-matching motion-estimation algorithms.

Santanu Dutta, Wayne H. Wolf

IEEE Trans. Circuits Syst. Video Technol., 1996

1995

A comprehensive delay model for CMOS inverters.

Santanu Dutta, Shivaling S. Mahant-Shetti, Stephen L. Lusky

IEEE J. Solid State Circuits, August, 1995

Asymptotic limits of video signal processing architectures.

Santanu Dutta, Wayne H. Wolf

IEEE Trans. Circuits Syst. Video Technol., 1995

VLSI issues in memory-system design for video signal processors.

Santanu Dutta, Wayne H. Wolf, Andrew Wolfe

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994

ASAP: A Transistor Sizing Tool for Speed Area and Power Optimization of Static CMOS Circuits.

Santanu Dutta, Sudip Nag, Kaushik Roy

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

Channel Architecture Optimization for Performance and Routability of Row-Based FPGAs.

Kaushik Roy, Sudip Nag, Santanu Dutta

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1990

DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation.

Douglas R. Holberg, Santanu Dutta, Lawrence T. Pillage

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989

A timing model for static CMOS gates.

Hau-Yung Chen, Santanu Dutta

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989