Sanroku Tsukamoto
According to our database1,
Sanroku Tsukamoto
authored at least 22 papers
between 1996 and 2017.
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On csauthors.net:
Bibliography
2017
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2017
2015
IEEE J. Solid State Circuits, 2015
2014
IEEE J. Solid State Circuits, 2014
7-bit 0.8-1.2GS/s Dynamic Architecture and Frequency Scaling subrange ADC with binary-search/flash Live Configuring Technique.
Proceedings of the Symposium on VLSI Circuits, 2014
2013
A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process.
IEEE J. Solid State Circuits, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
IEICE Trans. Electron., 2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
2010
IEEE Trans. Biomed. Circuits Syst., 2010
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
IEICE Trans. Electron., 2010
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2008
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
1998
IEEE J. Solid State Circuits, 1998
1996
IEEE J. Solid State Circuits, 1996