Sanpei Miyamoto

According to our database1, Sanpei Miyamoto authored at least 1 paper in 1996.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1996
A 250-622 MHz deskew and jitter-suppressed clock buffer using two-loop architecture.
IEEE J. Solid State Circuits, 1996


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