Sanna Määttä

According to our database1, Sanna Määttä authored at least 8 papers between 2007 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
Exploring NoC-Based MPSoC Design Space with Power Estimation Models.
IEEE Des. Test Comput., 2011

2010
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms.
Int. J. Embed. Real Time Commun. Syst., 2010

A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Model-based design flow for NoC-based MPSoCs.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Characterising embedded applications using a UML profile.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2008
Validation of executable application models mapped onto network-on-chip platforms.
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008

A simplified executable model to evaluate latency and throughput of networks-on-chip.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2007
Experiences of Using Object Oriented Programming Methods in High Level Network-on-Chip and System-on-Chip Design.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007


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