Sanjay V. Rajopadhye

According to our database, Sanjay V. Rajopadhye authored at least 122 papers between 1985 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2024

Taking RNA-RNA Interaction to Machine Peak.

Chiranjeb Mondal, Sanjay V. Rajopadhye

IEEE Trans. Parallel Distributed Syst., June, 2024

An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization of FPGA Accelerators.

Corentin Ferry, Nicolas Derumigny, Steven Derrien, Sanjay V. Rajopadhye

CoRR, 2024

2023

Distributed non-negative RESCAL with automatic model selection for exascale data.

Manish Bhattarai, Namita Kharat, Ismael Boureima, Erik Skau, Benjamin T. Nebgen, Hristo N. Djidjev, Sanjay V. Rajopadhye, James P. Smith, Boian S. Alexandrov

J. Parallel Distributed Comput., September, 2023

Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout.

Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

An Irredundant Decomposition of Data Flow with Affine Dependences.

Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye

CoRR, 2023

Maximal Simplification of Polyhedral Reductions.

Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye

CoRR, 2023

Automatic Algorithm-Based Fault Tolerance (AABFT) of Stencil Computations.

Louis Narmour, Steven Derrien, Sanjay V. Rajopadhye

Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022

Maximal Atomic irRedundant Sets: a Usage-based Dataflow Partitioning Algorithm.

Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye

CoRR, 2022

Distributed non-negative RESCAL with Automatic Model Selection for Exascale Data.

Manish Bhattarai, Namita Kharat, Erik Skau, Benjamin T. Nebgen, Hristo N. Djidjev, Sanjay V. Rajopadhye, James P. Smith, Boian S. Alexandrov

CoRR, 2022

2021

Monoparametric Tiling of Polyhedral Programs.

Guillaume Iooss, Christophe Alias, Sanjay V. Rajopadhye

Int. J. Parallel Program., 2021

BPPart: RNA-RNA Interaction Partition Function in the Absence of Entropy.

Ali Ebrahimpour Boroojeny, Sanjay V. Rajopadhye, Hamidreza Chitsaz

Proceedings of the 21st International Workshop on Algorithms in Bioinformatics, 2021

(When) Do Multiple Passes Save Energy?

Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

Accelerating the BPMax Algorithm for RNA-RNA Interaction.

Chiranjeb Mondal, Sanjay V. Rajopadhye

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

2020

Optimization Approach to Accelerator Codesign.

Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

LLOV: A Fast Static Data-Race Checker for OpenMP Programs.

Utpal Bora, Santanu Das, Pankaj Kukreja, Saurabh Joshi, Ramakrishna Upadrasta, Sanjay V. Rajopadhye

ACM Trans. Archit. Code Optim., 2020

On Simplifying Dependent Polyhedral Reductions.

Sanjay V. Rajopadhye

CoRR, 2020

A Tropical Semiring Multiple Matrix-Product Library on GPUs: (not just) a step towards RNA-RNA Interaction Computations.

Brandon Gildemaster, Prerana Ghalsasi, Sanjay V. Rajopadhye

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Revisiting Sparse Dynamic Programming for the 0/1 Knapsack Problem.

Tarequl Islam Sifat, Nirmal Prajapati, Sanjay V. Rajopadhye

Proceedings of the ICPP 2020: 49th International Conference on Parallel Processing, 2020

2018

A Code Generator for Energy-Efficient Wavefront Parallelization of Uniform Dependence Computations.

Yun Zou, Sanjay V. Rajopadhye

IEEE Trans. Parallel Distributed Syst., 2018

Analytical Cost Metrics : Days of Future Past.

Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev

CoRR, 2018

PCOT: Cache Oblivious Tiling of Polyhedral Programs.

Waruna Ranasinghe, Nirmal Prajapati, Tomofumi Yuki, Sanjay V. Rajopadhye

CoRR, 2018

2017

Accelerator Codesign as Non-Linear Optimization.

Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov

CoRR, 2017

Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils.

Nirmal Prajapati, Waruna Ranasinghe, Sanjay V. Rajopadhye, Rumen Andonov, Hristo N. Djidjev, Tobias Grosser

Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2017

One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs.

Gaël Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016

Hybrid Static/Dynamic Schedules for Tiled Polyhedral Programs.

Tian Jin, Nirmal Prajapati, Waruna Ranasinghe, Guillaume Iooss, Yun Zou, Sanjay V. Rajopadhye, David G. Wonnacott

CoRR, 2016

2015

Combining execution pipelines to improve parallel implementation of HMMER on FPGA.

Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton, Alexandre Cornu, Dominique Lavenier

Microprocess. Microsystems, 2015

Energy Modeling and Optimization for Tiled Nested-Loop Codes.

Nirmal Prajapati, Waruna Ranasinghe, Vamshi Tandrapati, Rumen Andonov, Hristo N. Djidjev, Sanjay V. Rajopadhye

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Automatic Energy Efficient Parallelization of Uniform Dependence Computations.

Yun Zou, Sanjay V. Rajopadhye

Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

2014

On Program Equivalence with Reductions.

Guillaume Iooss, Christophe Alias, Sanjay V. Rajopadhye

Proceedings of the Static Analysis - 21st International Symposium, 2014

Optimizing Dynamic Resource Allocation.

Lucas W. Krakow, Louis Rabiet, Yun Zou, Guillaume Iooss, Edwin K. P. Chong, Sanjay V. Rajopadhye

Proceedings of the International Conference on Computational Science, 2014

2013

Checking Race Freedom of Clocked X10 Programs.

Tomofumi Yuki, Paul Feautrier, Sanjay V. Rajopadhye, Vijay A. Saraswat

CoRR, 2013

Array dataflow analysis for polyhedral X10 programs.

Tomofumi Yuki, Paul Feautrier, Sanjay V. Rajopadhye, Vijay A. Saraswat

Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2013

Folklore Confirmed: Compiling for Speed = Compiling for Energy.

Tomofumi Yuki, Sanjay V. Rajopadhye

Proceedings of the Languages and Compilers for Parallel Computing, 2013

2012

Improving Reliability of Islanded Distribution Systems With Distributed Renewable Energy Resources.

Hilary E. Brown, Siddharth Suryanarayanan, Sudarshan Natarajan, Sanjay V. Rajopadhye

IEEE Trans. Smart Grid, 2012

Parameterized loop tiling.

Lakshminarayanan Renganarayanan, DaeGon Kim, Michelle Mills Strout, Sanjay V. Rajopadhye

ACM Trans. Program. Lang. Syst., 2012

Bridging the chasm between MDE and the world of compilation.

Jean-Marc Jézéquel, Benoît Combemale, Steven Derrien, Clément Guy, Sanjay V. Rajopadhye

Softw. Syst. Model., 2012

AlphaZ: A System for Design Space Exploration in the Polyhedral Model.

Tomofumi Yuki, Gautam Gupta, DaeGon Kim, Tanveer Pathan, Sanjay V. Rajopadhye

Proceedings of the Languages and Compilers for Parallel Computing, 2012

Scan detection and parallelization in "inherently sequential" nested loop programs.

Yun Zou, Sanjay V. Rajopadhye

Proceedings of the 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2012

2011

Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far?

Antoine Floch, Tomofumi Yuki, Clément Guy, Steven Derrien, Benoît Combemale, Sanjay V. Rajopadhye, Robert B. France

Proceedings of the Model Driven Engineering Languages and Systems, 2011

ompVerify: Polyhedral Analysis for the OpenMP Programmer.

V. Basupalli, Tomofumi Yuki, Sanjay V. Rajopadhye, Antoine Morvan, Steven Derrien, Patrice Quinton, David Wonnacott

Proceedings of the OpenMP in the Petascale Era - 7th International Workshop on OpenMP, 2011

Alphabets: An Extended Polyhedral Equational Language.

Sanjay V. Rajopadhye, Samik Gupta, DaeGon Kim

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Improving CUDASW++, a Parallelization of Smith-Waterman for CUDA Enabled Devices.

Doug Hains, Zach Cashero, Mark Ottenberg, Wim Bohm, Sanjay V. Rajopadhye

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

2010

Accelerating HMMER on FPGA using parallel prefixes and reductions.

Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton

Proceedings of the International Conference on Field-Programmable Technology, 2010

Automatic creation of tile size selection models.

Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye, Charles Anderson, Alexandre E. Eichenberger, Kevin O'Brien

Proceedings of the CGO 2010, 2010

2009

A reindexing based approach towards mapping of DAG with affine schedules onto parallel embedded systems.

Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset, Maurice Tchuenté

J. Parallel Distributed Comput., 2009

Efficient Tiled Loop Generation: D-Tiling.

DaeGon Kim, Sanjay V. Rajopadhye

Proceedings of the Languages and Compilers for Parallel Computing, 2009

2008

Positivity, posynomials and tile size selection.

Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye

Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008

A domain specific interconnect for reconfigurable computing.

Sanjay V. Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayanan

Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008

Smashing: Folding Space to Tile through Time.

Nissa Osheim, Michelle Mills Strout, Dave Rostron, Sanjay V. Rajopadhye

Proceedings of the Languages and Compilers for Parallel Computing, 2008

2007

Special Issue on ASAP 2004 Conference.

Joseph R. Cavallaro, Sanjay V. Rajopadhye, Lothar Thiele, Tobias Noll

J. VLSI Signal Process., 2007

Multi-level tiling: M for the price of one.

DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay V. Rajopadhye, Michelle Mills Strout

Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007

The Z-polyhedral model.

Gautam Gupta, Sanjay V. Rajopadhye

Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2007

Parameterized tiled loops for free.

Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay V. Rajopadhye, Michelle Mills Strout

Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, 2007

Towards Optimal Multi-level Tiling for Stencil Computations.

Lakshminarayanan Renganarayanan, Manjukumar Harthikote-Matha, Rinku Dewri, Sanjay V. Rajopadhye

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Scheduling in the Z-Polyhedral Model.

Gautam Gupta, DaeGon Kim, Sanjay V. Rajopadhye

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

0/1 Knapsack on Hardware: A Complete Solution.

K. Nibbelink, Sanjay V. Rajopadhye, Richard McConnell

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

Computations on Iteration Spaces.

Sanjay V. Rajopadhye, Lakshimarayanan Renganarayana, Gautam Gupta, Michelle Mills Strout

Proceedings of the Compiler Design Handbook: Optimizations and Machine Code Generation, 2007

2006

Simplifying reductions.

Gautam Gupta, Sanjay V. Rajopadhye

Proceedings of the 33rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2006

On Control Signals for Multi-Dimensional Time.

DaeGon Kim, Gautam Gupta, Sanjay V. Rajopadhye

Proceedings of the Languages and Compilers for Parallel Computing, 2006

An Improved Systolic Architecture for LU Decomposition.

DaeGon Kim, Sanjay V. Rajopadhye

Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005

Combined ILP and Register Tiling: Analytical Model and Optimization Framework.

Lakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye

Proceedings of the Languages and Compilers for Parallel Computing, 2005

A 1.5-D Architecture for Back-Propagation Training.

Sanjay V. Rajopadhye, Kolin Paul

Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

2004

A Geometric Programming Framework for Optimal Multi-Level Tiling.

Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye

Proceedings of the ACM/IEEE SC2004 Conference on High Performance Networking and Computing, 2004

2003

Optimal Semi-Oblique Tiling.

Rumen Andonov, Stephan Balev, Sanjay V. Rajopadhye, Nicola Yanev

IEEE Trans. Parallel Distributed Syst., 2003

Switched Memory Architectures-Moving Beyond Systolic Arrays.

Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye

Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002

Scheduling reductions on realistic machines.

Gautam Gupta, Sanjay V. Rajopadhye, Patrice Quinton

Proceedings of the Fourteenth Annual ACM Symposium on Parallel Algorithms and Architectures, 2002

Energy/Power Estimation of Regular Processor Arrays.

Sanjay V. Rajopadhye, Steven Derrien

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Dependence Analysis and Parallelizing Transformations.

Sanjay V. Rajopadhye

Proceedings of the Compiler Design Handbook: Optimizations and Machine Code Generation, 2002

2001

Combined instruction and loop parallelism in array synthesis for FPGAs.

Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms.

David Cachera, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset

Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

Uniformization of Affine Dependance Programs for Parallel Embedded System Design.

Manju Manjunathaiah, Graham M. Megson, Sanjay V. Rajopadhye, Tanguy Risset

Proceedings of the 2001 International Conference on Parallel Processing, 2001

Loop Tiling for Reconfigurable Accelerators.

Steven Derrien, Sanjay V. Rajopadhye

Proceedings of the Field-Programmable Logic and Applications, 2001

Combining Instruction and Loop Level Parallelism for FPGAs.

Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000

Optimizing memory usage in the polyhedral model.

Fabien Quilleré, Sanjay V. Rajopadhye

ACM Trans. Program. Lang. Syst., 2000

Derivation of systolic algorithms for the algebraic path problem by recurrence transformations.

Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset

Parallel Comput., 2000

Generation of Efficient Nested Loops from Polyhedra.

Fabien Quilleré, Sanjay V. Rajopadhye, Doran Wilde

Int. J. Parallel Program., 2000

Unbounded knapsack problem: Dynamic programming revisited.

Rumen Andonov, Vincent Poirriez, Sanjay V. Rajopadhye

Eur. J. Oper. Res., 2000

Optimal Partitioning for FPGA Based Regular Array Implementations.

Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay

Proceedings of the 2000 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000), 2000

FCCMS and the Memory Wall.

Steven Derrien, Sanjay V. Rajopadhye

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

Quadratic Control Signals in Linear Systolic Arrays.

Scott Bowden, Doran Wilde, Sanjay V. Rajopadhye

Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000

1999

The Algebraic Path Problem Revisited.

Sanjay V. Rajopadhye, Claude Tadonki, Tanguy Risset

Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

1998

Linear Programming Models for Scheduling Systems of Affine Recurrence Equations - A Comparative Study.

Stephan Balev, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset

Proceedings of the Tenth Annual ACM Symposium on Parallel Algorithms and Architectures, 1998

Optimal Orthogonal Tiling.

Rumen Andonov, Sanjay V. Rajopadhye, Nicola Yanev

Proceedings of the Euro-Par '98 Parallel Processing, 1998

1997

Knapsack on VLSI: from Algorithm to Optimal Circuit.

Rumen Andonov, Sanjay V. Rajopadhye

IEEE Trans. Parallel Distributed Syst., 1997

Multirate VLSI Arrays and Their Synthesis.

Patrick M. Lenders, Sanjay V. Rajopadhye

IEEE Trans. Computers, 1997

Memory Reuse Analysis in the Polyhedral Model.

Doran Wilde, Sanjay V. Rajopadhye

Parallel Process. Lett., 1997

On Manipulating <i>Z</i>-Polyhedra Using a Canonical Representation.

Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset

Parallel Process. Lett., 1997

Optimal Orthogonal Tiling of 2-D Iterations.

Rumen Andonov, Sanjay V. Rajopadhye

J. Parallel Distributed Comput., 1997

1996

Parallel Divide and Conquer on Meshes.

Virginia Mary Lo, Sanjay V. Rajopadhye, Jan Arne Telle, Xiaoxiong Zhong

IEEE Trans. Parallel Distributed Syst., 1996

A Regular VLSI Array for an Irregular Algorithm.

Florent de Dinechin, Doran Wilde, Sanjay V. Rajopadhye, Rumen Andonov

Proceedings of the Parallel Algorithms for Irregularly Structured Problems, 1996

Two-dimensional orthogonal tiling: from theory to practice.

Rumen Andonov, Hafid Bourzoufi, Sanjay V. Rajopadhye

Proceedings of the 3rd International Conference on High Performance Computing, 1996

Extension Of The Alpha Language To Recurrences On Sparse Periodic Domains.

Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset

Proceedings of the 1996 International Conference on Application-Specific Systems, 1996

1995

A Shift Registered-Based Systolic Array for the Unbounded Knapsack Problem.

Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde

Parallel Process. Lett., 1995

On deriving data parallel code from a functional program.

Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde

Proceedings of IPPS '95, 1995

Deriving Imperative Code from Functional Programs.

Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde

Proceedings of the seventh international conference on Functional programming languages and computer architecture, 1995

The naive execution of affine recurrence equations.

Doran Wilde, Sanjay V. Rajopadhye

Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995

Synthesis of Multirate VLSI Arrays.

Patrick M. Lenders, Sanjay V. Rajopadhye

Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995

1994

Pure Systolic Array for a Class of Dynamic Dependency Recurrences.

Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde

Proceedings of the Parcella 1994, 1994

Optimal Tile Sizing.

Rumen Andonov, Sanjay V. Rajopadhye

Proceedings of the Parallel Processing: CONPAR 94, 1994

A sparse knapsack algo-tech-cuit and its synthesis.

Rumen Andonov, Sanjay V. Rajopadhye

Proceedings of the International Conference on Application Specific Array Processors, 1994

1993

An improved systolic algorithm for the algebraic path problem.

Sanjay V. Rajopadhye

Integr., 1993

Analysis of Affine Communication Specifications.

Sanjay V. Rajopadhye

Proceedings of the Fifth IEEE Symposium on Parallel and Distributed Processing, 1993

Parallel Assignment, Reduction and Communication for Data Parallel Programming.

Sanjay V. Rajopadhye, Manjunath Muddarangegowda

Proceedings of the Sixth SIAM Conference on Parallel Processing for Scientific Computing, 1993

An optimal algo-tech-cuit for the knapsack problem.

Rumen Andonov, Sanjay V. Rajopadhye

Proceedings of the International Conference on Application-Specific Array Processors, 1993

1992

Systematic generation of linear allocation functions in systolic array design.

Xiaoxiong Zhong, Sanjay V. Rajopadhye, Ivan Wong

J. VLSI Signal Process., 1992

Quasi-Linear allocation functions for efficient array design.

Xiaoxiong Zhong, Sanjay V. Rajopadhye

J. VLSI Signal Process., 1992

Parallel Implementation of Divide-and-Conquer Algorithms on Binary de Bruijn Networks.

Xiaoxiong Zhong, Sanjay V. Rajopadhye, Virginia Mary Lo

Proceedings of the 6th International Parallel Processing Symposium, 1992

Reasoning about Permutations in Regular Arrays.

Björn Lisper, Sanjay V. Rajopadhye

Proceedings of the Designing Correct Circuits, 1992

1991

OREGAMI: Tools for mapping parallel computations to parallel architectures.

Virginia Mary Lo, Sanjay V. Rajopadhye, Samik Gupta, David Keldsen, Moataz A. Mohamed, Bill Nitzberg, Jan Arne Telle, Xiaoxiong Zhong

Int. J. Parallel Program., 1991

Deriving Fully Efficient Systolic Arrays by Quasi-Linear Allocation Functions.

Xiaoxiong Zhong, Sanjay V. Rajopadhye

Proceedings of the PARLE '91: Parallel Architectures and Languages Europe, 1991

Synthesizing fully efficient systolic arrays.

Xiaoxiong Zhong, Sanjay V. Rajopadhye

Proceedings of the 1991 International Conference on Acoustics, 1991

A folding transformation for VLSI IIR filter array design.

Sanjay V. Rajopadhye, Sayfe Kiaei

Proceedings of the 1991 International Conference on Acoustics, 1991

1990

Synthesizing systolic arrays from recurrence equations.

Sanjay V. Rajopadhye, Richard Fujimoto

Parallel Comput., 1990

Automating the design of systolic arrays.

Sanjay V. Rajopadhye, Richard M. Fujimoto

Integr., 1990

Mapping Divide-and-Conquer Algorithms to Parallel Architectures.

Virginia Mary Lo, Sanjay V. Rajopadhye, Samik Gupta, David Keldsen, Moataz A. Mohamed, Jan Arne Telle

Proceedings of the 1990 International Conference on Parallel Processing, 1990

OREGAMI: Software Tools for Mapping Parallel Computations to Parallel Architectures.

Virginia Mary Lo, Sanjay V. Rajopadhye, Samik Gupta, David Keldsen, Moataz A. Mohamed, Jan Arne Telle

Proceedings of the 1990 International Conference on Parallel Processing, 1990

Scheduling affine parameterized recurrences by means of Variable Dependent Timing Functions.

Christophe Mauras, Patrice Quinton, Sanjay V. Rajopadhye, Yannick Saouter

Proceedings of the Application Specific Array Processors, 1990

1989

Synthesizing Systolic Arrays with Control Signals from Recurrence Equations.

Sanjay V. Rajopadhye

Distributed Comput., 1989

1987

Systolic Array Synthesis by Static Analysis of Program Dependencies.

Sanjay V. Rajopadhye, Richard Fujimoto

Proceedings of the PARLE, 1987

1986

Verification of Systolic Arrays: A Stream Function Approach.

Sanjay V. Rajopadhye, Prakash Panangaden

Proceedings of the International Conference on Parallel Processing, 1986

On Synthesizing Systolic Arrays from Recurrence Equations with Linear Dependencies.

Sanjay V. Rajopadhye, S. Purushothaman, Richard Fujimoto

Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1986

1985

Formal semantics for a symbolic IC design technique: Examples and applications.

Sanjay V. Rajopadhye, P. A. Subrahmanyam

Integr., 1985