Sanjay V. Kumar

According to our database1, Sanjay V. Kumar authored at least 11 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2012
A holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced stress considerations.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Circuit reliability: From Physics to Architectures: Embedded tutorial paper.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011
Adaptive Techniques for Overcoming Performance Degradation Due to Aging in CMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2009
Adaptive techniques for overcoming performance degradation due to aging in digital circuits.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Body Bias Voltage Computations for Process and Temperature Compensation.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Thermally Aware Design.
Found. Trends Electron. Des. Autom., 2008

A framework for block-based timing sensitivity analysis.
Proceedings of the 45th Design Automation Conference, 2008

2007
NBTI-Aware Synthesis of Digital Circuits.
Proceedings of the 44th Design Automation Conference, 2007

2006
Impact of NBTI on SRAM Read Stability and Design for Reliability.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

An analytical model for negative bias temperature instability.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006


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