Sang-Sic Yoon

According to our database, Sang-Sic Yoon authored at least 4 papers between 1999 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.

Myeong-Jae Park, Ho Sung Cho, Tae-Sik Yun, Sangjin Byeon, Young Jun Koo, Sang-Sic Yoon, Dong-Uk Lee, Seokwoo Choi, Ji Hwan Park, Jinhyung Lee, Kyungjun Cho, Junil Moon, Byung Kuk Yoon, Young Jun Park, Sangmuk Oh, Chang Kwon Lee, Tae-Kyun Kim, Seong-Hee Lee, Hyun-Woo Kim, Yucheon Ju, Seung-Kyun Lim, Seung Geun Baek, Kyo Yun Lee, Sang Hun Lee, Woo Sung We, Seungchan Kim, Yongseok Choi, Seong-Hak Lee, Seung Min Yang, Gunho Lee, In-Keun Kim, Younghyun Jeon, Jae-Hyung Park, Jong Chan Yun, Chanhee Park, Sun-Yeol Kim, Sungjin Kim, Dong-Yeol Lee, Su-Hyun Oh, Taejin Hwang, Junghyun Shin, Yunho Lee, Hyunsik Kim, Jaeseung Lee, Youngdo Hur, Sangkwon Lee, Jieun Jang, Junhyun Chun, Joohwan Cho

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2018

A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications.

Kyu-Dong Hwang, Boram Kim, Sang-Yeon Byeon, Kyu-Young Kim, Dae-Han Kwon, Hyun-Bae Lee, Geun-Il Lee, Sang-Sic Yoon, Jin-Youp Cha, Soo-Young Jang, Seung-Hun Lee, Yongsuk Joo, Gang-Sik Lee, Sung-Soo Xi, Soo-Bin Lim, Kyung-Ho Chu, Joohwan Cho, Junhyun Chun, Jonghoon Oh, Jinkook Kim, Seok Hee Lee

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2003

Implementation of a parallel turbo decoder with dividable interleaver.

Jaeyoung Kwak, Sook Min Park, Sang-Sic Yoon, Kwyro Lee

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

1999

A design of the new FPGA with data path logic and run time block reconfiguration method.

Jaeyoung Kwak, Sang-Sic Yoon, Hung-Jun Kwon, Kwyro Lee

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999