Sandeep Krishna Thirumala

Orcid: 0000-0001-9448-324X

According to our database1, Sandeep Krishna Thirumala authored at least 17 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2024
SiTe CiM: Signed Ternary Computing-in-Memory for Ultra-Low Precision Deep Neural Networks.
CoRR, 2024

2023

2022
Exploring the Design of Energy-Efficient Intermittently Powered Systems Using Reconfigurable Ferroelectric Transistors.
IEEE Trans. Very Large Scale Integr. Syst., 2022

STeP-CiM: Strain-enabled Ternary Precision Computation-in-Memory based on Non-Volatile 2D Piezoelectric Transistors.
CoRR, 2022

2020
IPS-CiM: Enhancing Energy Efficiency of Intermittently-Powered Systems with Compute-in-Memory.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Polarization-induced Strain-coupled TMD FETs (PS FETs) for Non-Volatile Memory Applications.
Proceedings of the 2020 Device Research Conference, 2020

Utilizing Valley-Spin Hall Effect in WSe2 for Low Power Non-Volatile Flip-Flop Design.
Proceedings of the 2020 Device Research Conference, 2020

Ternary Compute-Enabled Memory using Ferroelectric Transistors for Accelerating Deep Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
A Family of Compact Non-Volatile Flip-Flops With Ferroelectric FET.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support.
CoRR, 2019

Non-volatile Logic and Memory based on Reconfigurable Ferroelectric Transistors.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Non-Volatile Memory utilizing Reconfigurable Ferroelectric Transistors to enable Differential Read and Energy-Efficient In-Memory Computation.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

WSe2 based Valley-Coupled-Spintronic Devices for Low Power Non-Volatile Memories.
Proceedings of the Device Research Conference, 2019

2018
Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

CTCG: Charge-trap based camouflaged gates for reverse engineering prevention.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Gate Leakage in Non-Volatile Ferroelectric Transistors: Device-Circuit Implications.
Proceedings of the 76th Device Research Conference, 2018

Computing with ferroelectric FETs: Devices, models, systems, and applications.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018


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