Sandeep Dhariwal

Orcid: 0000-0001-9013-1159

According to our database¹, Sandeep Dhariwal authored at least 4 papers between 2020 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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2023

Low Power Full Adders based on Proposed Hybrid and GDI Designs: A Novel Approach.

[BibT_eX]

[DOI]

Int. J. Perform. Eng., 2023

2022

Hybrid GDI PTL Full Adder: A Proposed Design for Low Power Applications.

[BibT_eX]

[DOI]

Int. J. Perform. Eng., 2022

2020

Delay Reduction by Implementation of Voltage-Controlled Ring Oscillator with Reverse Substrate Bias.

[BibT_eX]

[DOI]

Ravi Shankar Mishra

Sandeep Dhariwal

Int. J. Perform. Eng., 2020

Design and Analysis of Power and Area Efficient Novel Concurrent Cellular Automation Logic Block Observer BIST Structure.

[BibT_eX]

[DOI]

Sandeep Dhariwal

Ravi Trivedi

Int. J. Perform. Eng., 2020

Sandeep Dhariwal

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