Sanatan Chattopadhyay

According to our database, Sanatan Chattopadhyay authored at least 10 papers between 2007 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Entangled electron-photon pair production by channel-exchange in high-energy Compton scattering.

Basudev Nag Chowdhury, Sanatan Chattopadhyay

Quantum Inf. Process., 2021

2020

Investigating the impact of growth time on the electrical performance of vapour-liquid-solid (VLS) grown Ge/n-Si hetero-junction.

Subrata Mandal, Subhrajit Sikdar, Rajib Saha, Anupam Karmakar, Sanatan Chattopadhyay

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

Comparative study for the impedimetric detection and quantification of adulterants in different bio-consumables.

Chirantan Das, Subhadip Chakraborty, Anupam Karmakar, Sanatan Chattopadhyay

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

Investigation of density and alignment of ZnO-nanowires grown by double-step chemical bath deposition (CBD/CBD) technique on metallic, insulating and semiconducting substrates.

Sandip Bhattacharya, Rajib Saha, Subhrajit Sikdar, Subrata Mandal, Chirantan Das, Sanatan Chattopadhyay

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

Growth of ZnSnO3 nano-crystalloids on Sisubstrate by employing chemical bath deposition (CBD) technique for self-powered UV-light sensing applications.

Anannya Bhattacharya, Susomon Dutta, Sreeparna Paul, Subhrajit Sikdar, Sanatan Chattopadhyay

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

Electrically isolated buried electrode biosensor for detecting folic acid concentration.

Alivia Basak, Subhadip Chakraborty, Chirantan Das, Anuraag Mukherjee, Rajib Saha, Anupam Karmakar, Sanatan Chattopadhyay

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

2014

Post Optimization of a Clock Tree for Dynamic Clock Tree Power Reduction in 45 nm and Below Technology Nodes.

Biswajit Patra, Amlan Chakrabarti, Sanatan Chattopadhyay

J. Low Power Electron., 2014

2012

A Novel Approach to Voltage-Drop Aware Placement in Large SoCs in Advanced Technology Nodes.

Biswajit Patra, Sanatan Chattopadhyay, Amlan Chakrabarti

Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

2008

Statistical modelling of the variation in advanced process technologies using a multi-level partitioned response.

Santosh Shedabale, Hiran Ramakrishnan, Gordon Russell, Alexandre Yakovlev, Sanatan Chattopadhyay

IET Circuits Devices Syst., 2008

2007

Impact of strain on the design of low-power high-speed circuits.

Hiran Ramakrishnan, Koushik Maharatna, Sanatan Chattopadhyay, Alexandre Yakovlev

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007