Samuel Leshner

According to our database, Samuel Leshner authored at least 6 papers between 2007 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2014

Independent N and P process monitors for body bias based process corner correction.

Lawrence T. Clark, David Kidd, Vineet Agrawal, Samuel Leshner, Gokul Krishnan

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

SRAM cell optimization for low AVT transistors.

Lawrence T. Clark, Samuel Leshner, George Tien

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Low power ARM® Cortex™-M0 CPU and SRAM using Deeply Depleted Channel (DDC) transistors with Vdd scaling and body bias.

Vineet Agrawal, N. Kepler, David Kidd, Gokul Krishnan, Samuel Leshner, T. Bakishev, D. Zhao, P. Ranade, R. Roy, M. Wojko, Lawrence T. Clark, Robert Rogenmoser, M. Hori, Taiji Ema, S. Moriwaki, T. Tsuruta, T. Yamada, J. Mitani, S. Wakayama

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2010

A Low Power, High Performance Threshold Logic-Based Standard Cell Multiplier in 65 nm CMOS.

Samuel Leshner, Krzysztof S. Berezowski, Xiaoyin Yao, Gayathri Chalivendra, Saurabh Patel, Sarma B. K. Vrudhula

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2008

Threshold Logic Gene Regulatory Model - Prediction of Dorsal-ventral Patterning and Hardware-based Simulation of Drosophila.

Tejaswi Gowda, Samuel Leshner, Sarma B. K. Vrudhula, Seungchan Kim

Proceedings of the First International Conference on Biomedical Electronics and Devices, 2008

2007

Synthesis of threshold logic circuits using tree matching.

Tejaswi Gowda, Samuel Leshner, Sarma B. K. Vrudhula, Goran Konjevod

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007