Sammy Cheung

According to our database, Sammy Cheung authored at least 3 papers between 1998 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2006

A methodology for FPGA to structured-ASIC synthesis and verification.

Michael D. Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo

Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

2000

A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM.

Sammy Cheung, Kar Keng Chua, Boon Jin Ang, Thow Pang Chong, Wei Lian Goay, Wei Yee Koay, Sin Wo Kuan, Chooi Pei Lim, Jiunn Shyong Oon, Theam Thye See, Chiakang Sung, Kim Pin Tan, Yu Fong Tan, Choong Kit Wong

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1998

A 6.9 ns, 560 macrocell, in system programmable, CMOS PLD with 3.3-5 volt I/O capability.

Dirk Reese, Eric Chun, Sammy Cheung, Edmond Lau, Michael Chu, Gwen Liang, Nghia Van Tran, Brad Vest, Richard Smolen, Minchang Liang, Seshan Sekariapuram, Behzad Nouban, Myron Wong, John Costello, John Turner

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998