Samir S. Rofail

According to our database, Samir S. Rofail authored at least 4 papers between 1994 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1999

A low-power 16×16-b parallel multiplier utilizing pass-transistor logic.

Chong-Fatt Law, Samir S. Rofail, Kiat Seng Yeo

IEEE J. Solid State Circuits, 1999

1998

A charge-trapping-based technique to design low-voltage BiCMOS logic circuits.

Kiat Seng Yeo, Samir S. Rofail

IEEE J. Solid State Circuits, 1998

1994

Low-voltage, low-power BiCMOS digital circuits.

Samir S. Rofail

IEEE J. Solid State Circuits, May, 1994

Schottky merged BiCMOS structures.

Samir S. Rofail, Mohamed I. Elmasry

IEEE J. Solid State Circuits, March, 1994