Sameer Yadav

According to our database, Sameer Yadav authored at least 7 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2024

Passive Voltage Amplification in FE-FE-DE Heterostructure.

Bhaskar Awadhiya, Sameer Yadav, Yashwanth Nanjappa, Abhishek Pahuja, Shivendra Yadav, Sachin Agrawal

IEEE Access, 2024

2023

Performance estimation of non-hysteretic negative capacitance FinFET based SRAM.

Sameer Yadav, P. N. Kondekar, Bhaskar Awadhiya

Microelectron. J., 2023

Comparative study of Negative Capacitance Field Effect Transistors with different doped hafnium oxides.

Bhaskar Awadhiya, Sameer Yadav

Microelectron. J., 2023

2022

Negative capacitance based phase-transition FET for low power applications: Device-circuit co-design.

Sameer Yadav, P. N. Kondekar, Pranshoo Upadhyay, Bhaskar Awadhiya

Microelectron. J., 2022

Insights into the operation of negative capacitance FinFET for low power logic applications.

Rajeewa Kumar Jaisawal, P. N. Kondekar, Sameer Yadav, Pranshoo Upadhyay, Bhaskar Awadhiya, Sunil Rathore

Microelectron. J., 2022

2021

A Fast Settling, High Slew Rate CMOS Recycling Folded Cascode Operational Transconductance Amplifier (OTA) for High Speed Applications.

Gargi Nandi, Sameer Yadav, P. N. Kondekar

Proceedings of the 12th International Conference on Computing Communication and Networking Technologies, 2021

2016

An area and performance aware ECG encoder design for wireless healthcare services.

Bharat Garg, Sameer Yadav, G. K. Sharma

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016