Salvatore Pontarelli

ACM J. Exp. Algorithmics, 2020

Improving Packet Flow Counting With Fingerprint Counting.

[BibT_eX]

[DOI]

Jorge Martínez

IEEE Commun. Lett., 2020

Fast Updates for Line-Rate HyperLogLog-Based Cardinality Estimation.

[BibT_eX]

[DOI]

IEEE Commun. Lett., 2020

FlexTCAM: Beyond Memory Based TCAM Emulation on FPGAs.

[BibT_eX]

[DOI]

Anees Ullah

Proceedings of the 2020 IEEE Conference on Network Function Virtualization and Software Defined Networks, 2020

Offloading Online MapReduce tasks with Stateful Programmable Data Planes.

[BibT_eX]

[DOI]

Proceedings of the 23rd Conference on Innovation in Clouds, 2020

Europe's First 5G-Ready Railway Trial Utilizing Integrated Optical Passive WDM Access and Broadband Millimeter-Wave to Deliver Multi-Gbit/s Seamless Connectivity.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Optical Communications, 2020

When filtering is not possible caching negatives with fingerprints comes to the rescue.

[BibT_eX]

[DOI]

Proceedings of the CoNEXT '20: The 16th International Conference on emerging Networking EXperiments and Technologies, 2020

2019

PR-TCAM: Efficient TCAM Emulation on Xilinx FPGAs Using Partial Reconfiguration.

[BibT_eX]

[DOI]

Anees Ullah

IEEE Trans. Very Large Scale Integr. Syst., 2019

Error Detection and Correction in SRAM Emulated TCAMs.

[BibT_eX]

[DOI]

Anees Ullah

IEEE Trans. Very Large Scale Integr. Syst., 2019

TupleMerge: Fast Software Packet Processing for Online Packet Classification.

[BibT_eX]

[DOI]

James Daly

Valerio Bruschi

IEEE/ACM Trans. Netw., 2019

XTRA: Towards Portable Transport Layer Functions.

[BibT_eX]

[DOI]

IEEE Trans. Netw. Serv. Manag., 2019

Survey of Performance Acceleration Techniques for Network Function Virtualization.

[BibT_eX]

[DOI]

Proc. IEEE, 2019

CuCoTrack: Cuckoo filter based connection tracking.

[BibT_eX]

[DOI]

Gil Levy

Inf. Process. Lett., 2019

Smashing OpenFlow's "atomic" actions: Programmable data plane packet manipulation in hardware.

[BibT_eX]

[DOI]

Int. J. Netw. Manag., 2019

CFBF: Reducing the Insertion Time of Cuckoo Filters With an Integrated Bloom Filter.

[BibT_eX]

[DOI]

Jorge Martínez

IEEE Commun. Lett., 2019

High-speed data plane and network functions virtualization by vectorizing packet processing.

[BibT_eX]

[DOI]

Comput. Networks, 2019

Accelerating Packet Classification with Two Class Cuckoo Filters (TC-CF).

[BibT_eX]

[DOI]

Jorge Martínez

Proceedings of the 6th International Conference on Software Defined Systems, 2019

FlowBlaze: Stateful Packet Processing in Hardware.

[BibT_eX]

[DOI]

Marco Spaziani Brunella

Proceedings of the 16th USENIX Symposium on Networked Systems Design and Implementation, 2019

Pushing Services to the Edge Using a Stateful Programmable Dataplane.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Networks and Communications, 2019

A Fingerprint-based Bloom Filter with Deletion Capabilities.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Networks and Communications, 2019

5G-PICTURE: A Programmable Multi-tenant 5G Compute-RAN-Transport Infrastructure.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Networks and Communications, 2019

Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

2018

EMOMA: Exact Match in One Memory Access.

[BibT_eX]

[DOI]

IEEE Trans. Knowl. Data Eng., 2018

Guest Editorial: Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology.

[BibT_eX]

[DOI]

Maria K. Michael

Omer Khan

IEEE Trans. Emerg. Top. Comput., 2018

High-Speed Software Data Plane via Vectorized Packet Processing.

[BibT_eX]

[DOI]

David Barach

IEEE Commun. Mag., 2018

Relaxing state-access constraints in stateful programmable data planes.

[BibT_eX]

[DOI]

Comput. Commun. Rev., 2018

A Fully Portable TCP Implementation Using XFSMs.

[BibT_eX]

[DOI]

Proceedings of the ACM SIGCOMM 2018 Conference on Posters and Demos, 2018

Batched packet processing for high-speed software data plane functions.

[BibT_eX]

[DOI]

David Barach

Proceedings of the IEEE INFOCOM 2018, 2018

Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays.

[BibT_eX]

[DOI]

Proceedings of the IEEE 19th International Conference on High Performance Switching and Routing, 2018

A Programmable Hardware Calendar for High Resolution Pacing.

[BibT_eX]

[DOI]

Michael Welzl

Proceedings of the IEEE 19th International Conference on High Performance Switching and Routing, 2018

V- PMP: A VLIW Packet Manipulator Processor.

[BibT_eX]

[DOI]

Marco Spaziani Brunella

Proceedings of the 2018 European Conference on Networks and Communications, 2018

2017

StreaMon: A Data-Plane Programming Abstraction for Software-Defined Stream Monitoring.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2017

A method to protect Cuckoo filters from soft errors.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2017

Relaxing constraints in stateful network data plane design.

[BibT_eX]

[DOI]

Carmelo Cascone

Roberto Bifulco

CoRR, 2017

Flexible Packet Matching with Single Double Cuckoo Hash.

[BibT_eX]

[DOI]

Gil Levy

IEEE Commun. Mag., 2017

Implementing a Per-Flow Token Bucket Using Open Packet Processor.

[BibT_eX]

[DOI]

Proceedings of the Digital Communication. Towards a Smart and Secure Future Internet, 2017

Implementing iptables using a programmable stateful data plane abstraction: Demo.

[BibT_eX]

[DOI]

Proceedings of the Symposium on SDN Research, 2017

On offloading programmable SDN controller tasks to the embedded microcontroller of stateful SDN dataplanes.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Conference on Network Softwarization, 2017

Smashing SDN "built-in" actions: Programmable data plane packet manipulation in hardware.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Conference on Network Softwarization, 2017

Demo: Implementing advanced network functions with stateful programmable data planes.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Symposium on Local and Metropolitan Area Networks, 2017

Implementing advanced network functions for datacenters with stateful programmable data planes.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Symposium on Local and Metropolitan Area Networks, 2017

2016

OMASS: One Memory Access Set Separation.

[BibT_eX]

[DOI]

IEEE Trans. Knowl. Data Eng., 2016

Parallel d-Pipeline: A Cuckoo Hashing Implementation for Increased Throughput.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Nanotechnology Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems.

[BibT_eX]

[DOI]

Cristiana Bolchini

Sandip Kundu

IEEE Trans. Computers, 2016

Improving counting Bloom filter performance with fingerprints.

[BibT_eX]

[DOI]

Inf. Process. Lett., 2016

Cuckoo Cache: A Technique to Improve Flow Monitoring Throughput.

[BibT_eX]

[DOI]

IEEE Internet Comput., 2016

Towards a Stateful Forwarding Abstraction to Implement Scalable Network Functions in Software and Hardware.

[BibT_eX]

[DOI]

CoRR, 2016

Open Packet Processor: a programmable architecture for wire speed platform-independent stateful in-network processing.

[BibT_eX]

[DOI]

CoRR, 2016

A length-aware cuckoo filter for faster IP lookup.

[BibT_eX]

[DOI]

Minseok Kwon

Proceedings of the IEEE Conference on Computer Communications Workshops, 2016

On the feasibility of "breadcrumb" trails within OpenFlow switches.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Networks and Communications, 2016

2015

MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

A Synergetic Use of Bloom Filters for Error Detection and Correction.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

A Class of SEC-DED-DAEC Codes Derived From Orthogonal Latin Square Codes.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Low Delay Single Symbol Error Correction Codes Based on Reed Solomon Codes.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2015

Dependable Multicore Architectures at Nanoscale: The View From Europe.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

IEEE Des. Test, 2015

Improving energy efficiency of Ethernet switching with modular Cuckoo hashing.

[BibT_eX]

[DOI]

Gil Levy

Proceedings of the 2015 IEEE Online Conference on Green Communications, 2015

Stateful OpenFlow: Hardware proof of concept.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on High Performance Switching and Routing, 2015

2T2M memristor based TCAM cell for low power applications.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

A method to protect Bloom filters from soft errors.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014

A Method to Extend Orthogonal Latin Square Codes.

[BibT_eX]

[DOI]

Alfonso Sánchez-Macián

IEEE Trans. Very Large Scale Integr. Syst., 2014

Efficient implementation of error correction codes in hash tables.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Editorial.

[BibT_eX]

[DOI]

Lorena Anghel

Cristiana Bolchini

Microprocess. Microsystems, 2014

Improving the performance of Invertible Bloom Lookup Tables.

[BibT_eX]

[DOI]

Inf. Process. Lett., 2014

Energy Efficient Exact Matching for Flow Identification with Cuckoo Affinity Hashing.

[BibT_eX]

[DOI]

IEEE Commun. Lett., 2014

Efficient Flow Sampling With Back-Annotated Cuckoo Hashing.

[BibT_eX]

[DOI]

IEEE Commun. Lett., 2014

Towards Wire-speed Platform-agnostic Control of OpenFlow Switches.

[BibT_eX]

[DOI]

CoRR, 2014

StreaMon: A software-defined monitoring platform.

[BibT_eX]

[DOI]

Proceedings of the 2014 26th International Teletraffic Congress (ITC), 2014

Complementary resistive switch based stateful logic operations using material implication.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Concurrent Error Detection for Orthogonal Latin Squares Encoders and Syndrome Computation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2013

An Efficient Technique to Protect Serial Shift Registers Against Soft Errors.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2013

Reducing the Cost of Implementing Error Correction Codes in Content Addressable Memories.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2013

A Method to Construct Low Delay Single Error Correction Codes for Protecting Data Bits Only.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Low Complexity Concurrent Error Detection for Complex Multiplication.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Error Detection and Correction in Content Addressable Memories by Using Bloom Filters.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System.

[BibT_eX]

[DOI]

Simone Teofili

IEEE Trans. Computers, 2013

F-DICE: A multiple node upset tolerant flip-flop for highly radioactive environments.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Error detection in ternary CAMs using bloom filters.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

A Reconfigurable Functional Unit for Modular Operations.

[BibT_eX]

[DOI]

Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2013

2012

Optimized Implementation of RNS FIR Filters Based on FPGAs.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2012

On the use of Karatsuba formula to detect errors in GF((2(sup)n(/sup))(sup)2(/sup)) multipliers.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2012

A novel write-scheme for data integrity in memristor-based crossbar memories.

[BibT_eX]

[DOI]

Angelo Giuseppe Ruotolo

Fabrizio Lombardi

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

On the design of two single event tolerant slave latches for scan delay testing.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies.

[BibT_eX]

[DOI]

Alessandro Paccagnella

Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

Karatsuba implementation of FIR filters.

[BibT_eX]

[DOI]

Pietro Albicocco

Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

2011

Hardware-Based "on-the-fly" Per-flow Scan Detector Pre-filter (Poster).

[BibT_eX]

[DOI]

Simone Teofili

Proceedings of the Traffic Monitoring and Analysis - Third International Workshop, 2011

Anti-evasion Technique for Packet Based Pre-filtering for Network Intrusion Detection Systems (Poster).

[BibT_eX]

[DOI]

Simone Teofili

Proceedings of the Traffic Monitoring and Analysis - Third International Workshop, 2011

On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Feedback based droop mitigation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

2010

High throughput and low power dissipation in QCA pipelines using Bennett clocking.

[BibT_eX]

[DOI]

Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

Exploiting Dynamic Reconfiguration for FPGA Based Network Intrusion Detection Systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Error Detection and Correction in Content Addressable Memories.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

Modeling Open Defects in Nanometric Scale CMOS.

[BibT_eX]

[DOI]

Anant Narayan Hariharan

Fabrizio Lombardi

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009

Error detection in addition chain based ECC Point Multiplication.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

Error Correction Codes for SEU and SEFI Tolerant Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008

Analysis and Evaluations of Reliability of Reconfigurable FPGAs.

[BibT_eX]

[DOI]

Vamsi Vankamamidi

Fabrizio Lombardi

J. Electron. Test., 2008

Totally Fault Tolerant RNS Based FIR Filters.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

A Novel Error Detection and Correction Technique for RNS Based FIR Filters.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2007

Concurrent Error Detection in Reed-Solomon Encoders and Decoders.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2007

Analysis of Errors and Erasures in Parity Sharing RS Codecs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2007

QCA Circuits for Robust Coplanar Crossing.

[BibT_eX]

[DOI]

J. Electron. Test., 2007

Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.

[BibT_eX]

[DOI]

Luca Sterpone

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Optimization of Self Checking FIR filters by means of Fault Injection Analysis.

[BibT_eX]

[DOI]

Luca Sterpone

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006

Fault Localization, Error Correction, and Graceful Degradation in Radix 2 Signed Digit-Based Adders.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

Fault tolerant design of signed digit based FIR filters.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Concurrent error detection in Reed Solomon decoders.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Localization of Faults in Radix-n Signed Digit Adders.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Reliability Evaluation of Repairable/Reconfigurable FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

Design and Evaluation of a Hardware on-line Program-Flow Checker for Embedded Microcontrollers.

[BibT_eX]

[DOI]

Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

Novel designs for thermally robust coplanar crossing in QCA.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

A Comparative Evaluation of Designs for Reliable Memory Systems.

[BibT_eX]

[DOI]

J. Electron. Test., 2005

Design of a QCA Memory with Parallel Read/Serial Write.

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Evaluating the Data Integrity of Memory Systems by Configurable Markov Models.

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Design of a Self Checking Reed Solomon Encoder.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

FPGA oriented design of parity sharing RS codecs.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

A Self Checking Reed Solomon Encoder: Design and Analysis.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

2004

A Signed Digit Adder with Error Correction and Graceful Degradation Capabilities.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

Data Integrity Evaluations of Reed Solomon Codes for Storage Systems.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

2003

Design of a fault tolerant solid state mass memory.

[BibT_eX]

[DOI]

IEEE Trans. Reliab., 2003

A fault tolerant hardware based file system manager for solid state mass memory.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Error Detection in Signed Digit Arithmetic Circuit with Parity Checker.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

2002

A self-checking cell logic block for fault tolerant FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Bit Flip Injection in Processor-Based Architectures: A Case Study.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

2001

Development of a dynamic routing system for a fault tolerant solid state mass memory.

[BibT_eX]

[DOI]

Panfilo Marinucci

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

Design of a Totally Self Checking Signature Analysis Checker for Finite State Machines.

[BibT_eX]

[DOI]