Salma Hesham

Orcid: 0000-0003-0021-1468

According to our database1, Salma Hesham authored at least 13 papers between 2013 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2020
HPPT-NoC: A Dark-Silicon Inspired Hierarchical TDM NoC with Efficient Power-Performance Trading.
IEEE Trans. Parallel Distributed Syst., 2020

Towards a Modular RISC-V Based Many-Core Architecture for FPGA Accelerators.
IEEE Access, 2020

Energy Efficient Synchronous - Asynchronous Circuit-Switched NoC.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

2019
Dark-Silicon Inspired Energy Efficient Hierarchical TDM NoC.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018
Analysis of Synchronous-Asynchronous NoC for the Dark Silicon Era.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

2017
Survey on Real-Time Networks-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2017

A call-up for circuit-switched NoCs in the Dark-Silicon Era.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

Hardware acceleration of novel chaos-based image encryption for IoT applications.
Proceedings of the 29th International Conference on Microelectronics, 2017

2016
ARTNoCs: An Evaluation Framework for Hardware Architectures of Real-Time NoCs.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
Online bicast allocation algorithm for contention-free-routing NoCs.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Survey on Real-Time Network-on-Chip Architectures.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
High throughput architecture for the Advanced Encryption Standard Algorithm.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
Real-time efficient FPGA implementation of aes algorithm.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013


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