Sallar Ahmadi-Pour

According to our database, Sallar Ahmadi-Pour authored at least 15 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Lower the RISC: Designing optical-probing-attack-resistant cores.

Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler

Microprocess. Microsystems, 2024

Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic.

Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

Processor Vulnerability Detection with the Aid of Assertions: RISC-V Case Study.

Mohammad Reza Heidari Iman, Sallar Ahmadi-Pour, Rolf Drechsler, Tara Ghasempouri

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

LLM-Guided Formal Verification Coupled with Mutation Testing.

Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification.

Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Security Coverage Metrics for Information Flow at the System Level.

Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

MARADIV: Library of MAGIC-Based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors.

Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler

IEEE Trans. Circuits Syst. II Express Briefs, July, 2023

Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap.

Sallar Ahmadi-Pour, Pascal Pieper, Rolf Drechsler

CoRR, 2023

Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal Verification.

Milan Funck, Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler

Proceedings of the Forum on Specification & Design Languages, 2023

Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core.

Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler

Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2023

2022

The MicroRV32 framework: An accessible and configurable open source RISC-V cross-level platform for education and research.

Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler

J. Syst. Archit., 2022

Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems: A RISC-V Case-Study.

Sallar Ahmadi-Pour, Sangeet Saha, Vladimir Herdt, Rolf Drechsler, Klaus D. McDonald-Maier

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021

Constrained Random Verification for RISC-V: Overview, Evaluation and Discussion.

Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2021

RISC-V AMS VP: An Open Source Evaluation Platform for Cyber-Physical Systems.

Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler

Proceedings of the 24th Forum on specification & Design Languages, 2021

2019

Ultrasonic Wireless Sensor Network for Human Habitation in Deep Space Mission.

Hendra Kesuma, Sallar Ahmadi-Pour, Hans-Jürgen Zimmerman, Amber Joseph, Patrick Weis

Proceedings of the 2019 IEEE International Conference on Wireless for Space and Extreme Environments, 2019