Salim Ullah

ACM Trans. Reconfigurable Technol. Syst., June, 2024

AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024

BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators.

[BibT_eX]

[DOI]

Yuhao Liu

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

2023

NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., December, 2023

High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., December, 2023

AxOTreeS: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., October, 2023

AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming.

[BibT_eX]

[DOI]

CoRR, 2023

NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks.

[BibT_eX]

[DOI]

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Design, Analysis, and Applications of Approximate Arithmetic Modules.

[BibT_eX]

[DOI]

PhD thesis, 2022

AppAxO: Designing Application-specific Approximate Operators for FPGA-based Embedded Systems.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2022

High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2022

ERMES: Efficient Racetrack Memory Emulation System based on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

Multi-Precision Deep Neural Network Acceleration on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators.

[BibT_eX]

[DOI]

Tuan Duy Anh Nguyen

IEEE Embed. Syst. Lett., 2021

ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems.

[BibT_eX]

[DOI]

IEEE Access, 2021

MemOReL: A Memory-oriented Optimization Approach to Reinforcement Learning on FPGA-based Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

ALigN: A Highly Accurate Adaptive Layerwise Log_2_Lead Quantization of Pre-Trained Neural Networks.

[BibT_eX]

[DOI]

IEEE Access, 2020

An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy.

[BibT_eX]

[DOI]

Zahra Ebrahimi

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

L2L: A Highly Accurate Log_2_Lead Quantization of Pre-trained Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

LeAp: Leading-one Detection-based Softcore Approximate Multipliers with Tunable Accuracy.

[BibT_eX]

[DOI]

Zahra Ebrahimi

Bharath Srinivas Prabakaran

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Design Methodology for Embedded Approximate Artificial Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

A Comparative Analysis of Neural Networks and Enhancement of ELM for Short Term Load Forecasting.

[BibT_eX]

[DOI]

Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2019

2018

DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems.

[BibT_eX]

[DOI]

Semeen Rehman

Muhammad Abdullah Hanif

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators.

[BibT_eX]

[DOI]

Bharath Srinivas Prabakaran

Semeen Rehman

Florian Kriebel

Muhammad Abdullah Hanif

Muhammad Shafique

Proceedings of the 55th Annual Design Automation Conference, 2018

SMApproxlib: library of FPGA-based approximate multipliers.

[BibT_eX]

[DOI]

Sanjeev Sripadraj Murthy