Saleh Abdel-Hafeez

According to our database, Saleh Abdel-Hafeez authored at least 19 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A fast and cost-effective integer restoring division hardware.

Saleh Abdel-Hafeez

Comput. Electr. Eng., 2024

2023

Programmable Feedback Shift Register.

Saleh Abdel-Hafeez

Circuits Syst. Signal Process., August, 2023

A novel self-timing CMOS first-edge take-all circuit for on-chip communication systems.

Saleh Abdel-Hafeez, Shadi M. Harb

IET Comput. Digit. Tech., 2023

2022

Design of memory Alias Table based on the SRAM 8T-Cell.

Saleh Abdel-Hafeez, Sanabel Otoom, Muhannad Quwaider

Int. J. Circuit Theory Appl., 2022

2021

Reconfigurable FIFO memory circuit for synchronous and asynchronous communication.

Saleh Abdel-Hafeez, Ann Gordon-Ross

Int. J. Circuit Theory Appl., 2021

2019

A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems.

Ann Gordon-Ross, Saleh Abdel-Hafeez, Mohamad Hammam Alsafrjalani

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018

A comparison-free sorting algorithm on CPUs and GPUs.

Saleh Abdel-Hafeez, Ann Gordon-Ross, Samer Abubaker

J. Supercomput., 2018

High-Speed Low-Power Flash ADC Architecture Using Switched-Capacitor Positive Feedback Comparator and Parallel Single-Gate Encoder.

Saleh Abdel-Hafeez, Ali M. Shatnawi

Circuits Syst. Signal Process., 2018

2017

An Efficient O(N) Comparison-Free Sorting Algorithm.

Saleh Abdel-Hafeez, Ann Gordon-Ross

IEEE Trans. Very Large Scale Integr. Syst., 2017

2013

Scalable Digital CMOS Comparator Using a Parallel Prefix Tree.

Saleh Abdel-Hafeez, Ann Gordon-Ross, Behrooz Parhami

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

A double data rate 8T-cell SRAM architecture for systems-on-chip.

Saleh Abdel-Hafeez, Mohammad Shatnawi, Ann Gordon-Ross

Proceedings of the 2012 International Symposium on System on Chip, 2012

2011

A Digital CMOS Parallel Counter Architecture Based on State Look-Ahead Logic.

Saleh Abdel-Hafeez, Ann Gordon-Ross

IEEE Trans. Very Large Scale Integr. Syst., 2011

A Shadow Dynamic Finite State Machine for Branch Prediction: An Alternative for the 2-bit Saturating Counter.

Saleh Abdel-Hafeez, Ann Gordon-Ross, Asem Albosul, Ahmad Shatnawi, Shadi M. Harb

Informatica (Slovenia), 2011

A Gigahertz Digital CMOS Divide-by-<i>N</i> Frequency Divider Based on a State Look-Ahead Structure.

Saleh Abdel-Hafeez, Ann Gordon-Ross

Circuits Syst. Signal Process., 2011

2008

CMOS Eight-Transistor Memory Cell for Low-Dynamic-Power High-Speed Embedded SRAM.

Saleh Abdel-Hafeez, Anas S. Matalkah

J. Circuits Syst. Comput., 2008

High speed digital CMOS divide-by-N fequency divider.

Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A low-power CAM using a 12-transistor design cell.

Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt

Proceedings of the IFIP VLSI-SoC 2007, 2007

Low-Power Content Addressable Memory With Read/Write and Matched Mask Ports.

Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2006

A VLSI High-Performance Priority Encoder Using Standard CMOS Library.

Saleh Abdel-Hafeez, Shadi M. Harb

IEEE Trans. Circuits Syst. II Express Briefs, 2006