Sakir Sezer

J. Comput. Networks Commun., 2008

High performance IP lookup circuit using DDR SDRAM.

[BibT_eX]

[DOI]

Earl E. Swartzlander Jr.

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Multi-standard sub-pixel interpolation architecture for video Motion Estimation.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Application development flow for on-chip distributed architectures.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

2007

A versatile content addressable memory architecture.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International SOC Conference, 2007

Programmable CRC circuit architecture.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International SOC Conference, 2007

Accelerating pattern matching for DPI.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International SOC Conference, 2007

Reconfigurable video motion estimation processor.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International SOC Conference, 2007

An FPGA Based Memory Efficient Shared Buffer Implementation.

[BibT_eX]

[DOI]

Proceedings of the FPL 2007, 2007

Exploring technology related design-space limitations of high performance network processing.

[BibT_eX]

[DOI]

Máire O'Neill

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Reconfigurable Motion Estimation Architecture for Multi-standard Video Compression.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

Novel Content Addressable Memory Architecture for Adaptive Systems.

[BibT_eX]

[DOI]

Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

An RLDRAM II Implementation of a 10Gbps Shared Packet Buffer for Network Processing.

[BibT_eX]

[DOI]

Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

High-Speed IP Address Lookups Using Hardware Based Tree Structures.

[BibT_eX]

[DOI]

Kieran McLaughlin

Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

Systolic Array Based Architecture for Variable Block-Size Motion Estimation.

[BibT_eX]

[DOI]

Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

FPGA-Based Lookup Circuit for Session-Based IP Packet Classification.

[BibT_eX]

[DOI]

Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

2006

Delay-bound preservation through packet scheduling at wireless access point nodes.

[BibT_eX]

[DOI]

Steven Walsh

Emi Garcia

Proceedings of the 3rd international conference on Mobile technology, 2006

A VLSI GFP Frame Delineation Circuit.

[BibT_eX]

[DOI]

Xin Yang

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

High performance service-time-stamp computation for WFQ IP packet scheduling.

[BibT_eX]

[DOI]

Colm McKillen

Xin Yang

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Investigation into programmability for layer 2 protocol frame delineation architectures.

[BibT_eX]

[DOI]

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

A Study of Shared Buffer Memory Segmentation for Packet Switched Networks.

[BibT_eX]

[DOI]

Lum Soong Lit

Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 2006

Exploring CAM Design For Network Processing Using FPGA Technology.

[BibT_eX]

[DOI]

Kieran McLaughlin

Niall O'Connor

Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 2006

Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup.

[BibT_eX]

[DOI]

Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 2006

2005

Design and implementation of a shared buffer architecture for a gigabit Ethernet packet switch.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Assessing the Impact of Rainfall on System Bandwidth for Broadband Fixed Wireless Applications.

[BibT_eX]

[DOI]

Steven Walsh

Emi Garcia

Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

A 10 Gbps GFP Frame Delineation Circuit with Single Bit Error Correction on an FPGA.

[BibT_eX]

[DOI]

The Design and Implementation of a Shared Packet Buffer Architecture for Fixed and Variable Sized Packets.

[BibT_eX]

[DOI]

Colm McKillen

Reconfigurable Instruction Interface Architecture for Private-Key Cryptography on the Altera Nios-II Processor.

[BibT_eX]

[DOI]

P. Moore

Máire McLoone

Implementing High Speed IP Address Lookups in Hardware.

[BibT_eX]

[DOI]

Kieran McLaughlin

Packet Classification Using Adaptive Rules Cutting (ARC).

[BibT_eX]

[DOI]

2004

Exploration of GFP frame delineation architectures for network processing.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

A weighted fair queuing finishing tag computation architecture and implementation.

[BibT_eX]

[DOI]

Colm McKillen

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

A Reconfigurable Tag Computation Architecture for Terabit Packet Scheduling.

[BibT_eX]

[DOI]

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

The Implementation of Scalable ATM Frame Delineation Circuits.

[BibT_eX]

[DOI]

Proceedings of the Telecommunications and Networking, 2004

Adaptive Echo Cancellation for Packet-Based Networks.

[BibT_eX]

[DOI]

Victoria Stewart

C. F. N. Cowan

Proceedings of the Telecommunications and Networking, 2004

Implementation of a Novel Credit Based SCFQ Scheduler for Broadband Wireless Access.

[BibT_eX]

[DOI]

Proceedings of the Telecommunications and Networking, 2004

Web Based Service Provision - A Case Study: Electronic Design Automation.

[BibT_eX]

[DOI]

Stephen Dawson

Proceedings of the Telecommunications and Networking, 2004

Architecture and implementation of a novel tag computation circuit for broadband wireless access packet scheduling.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2004

An investigation into the design of high-performance shared buffer architectures based on FPGA technology with embedded memory.

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003

A 32-Bit SoPC Implementation of a P5.

[BibT_eX]

[DOI]

Proceedings of the Eighth IEEE Symposium on Computers and Communications (ISCC 2003), 30 June, 2003

A Programmable and Highly Pipelined PPP Architecture for Gigabit IP over SDH/SONET.

[BibT_eX]

[DOI]

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

A Framework for Remote EDA Tooling and Distributed Resource Management.

[BibT_eX]

Stephen Dawson

Proceedings of the International Conference on Internet Computing, 2003

Custom Tag Computation Circuit for a 10Gbps SCFQ Scheduler.

[BibT_eX]

[DOI]

Brendan McAllister

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

A Pipelined SoPC Architecture for 2.5 Gbps Network Processing.

[BibT_eX]

[DOI]

Xing Yu

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2001

Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2001

System on a FPGA Virtual Concatenation.

[BibT_eX]

[DOI]

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000

Performance Analysis of Access Points In Cellular Wireless ATM Networks.

[BibT_eX]

Proceedings of the Managing QoS in Multimedia Networks and Services, IEEE/IFIP TC6, 2000

1999

The Influence of Cumulative Switch Delay in Multiple Service Class Networks.

[BibT_eX]

Alan Marshall