Sajjad Rostami Sani

According to our database, Sajjad Rostami Sani authored at least 7 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Evaluating the Impact of Using Multiple-Metal Layers on the Layout Area of Switch Blocks for Tile-Based FPGAs in FinFET 7nm.

Sajjad Rostami Sani, Andy Gean Ye

ACM Trans. Reconfigurable Technol. Syst., March, 2024

2022

Measuring the effect of track count and wire segment length on the layout area of switch blocks for tile-based FPGAs.

Sajjad Rostami Sani, Andy Gean Ye

Microprocess. Microsystems, July, 2022

The effect of gate voltage boosting on the power efficiency of multi-context FPGAs.

Anas Razzaq, Sajjad Rostami Sani, Andy Gean Ye

Integr., 2022

Evaluating the impact of using multiple-metal layers on the layout area of switch blocks for tile-based FPGAs in FinFET 7nm.

Sajjad Rostami Sani, Anas Razzaq, Andy Gean Ye

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021

Designing efficient FPGA tiles for power-constrained ultra-low-power applications.

Anas Razzaq, Sajjad Rostami Sani, Andy Gean Ye

Integr., 2021

2020

Measuring the Accuracy of Layout Area Estimation Models of Tile-Based FPGAs in FinFET Technology.

Sajjad Rostami Sani, Farheen Fatima Khan, Anas Razzaq, Andy Gean Ye

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2019

Parloom: A New Low-Power Set-Associative Instruction Cache Architecture Utilizing Enhanced Counting Bloom Filter and Partial Tags.

Sajjad Rostami Sani, Mojtaba Valinataj, Saeideh Alinezhad Chamazcoti

J. Circuits Syst. Comput., 2019