Sajjad Nouri
Orcid: 0009-0000-1425-4560
According to our database1,
Sajjad Nouri
authored at least 10 papers
between 2015 and 2023.
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Bibliography
2023
Channel Estimation Based on Compressed Sensing for Massive MIMO Systems With Lens Antenna Array.
IEEE Access, 2023
2018
Errata to "Evaluation of a Heterogeneous Multicore Architecture by Design and Test of an OFDM Receiver".
IEEE Trans. Parallel Distributed Syst., 2018
Power mitigation of a heterogeneous multicore architecture on FPGA/ASIC by DFS/DVFS techniques.
Microprocess. Microsystems, 2018
Design and Implementation of 2D IDCT/IDST-Specific Accelerator on Heterogeneous Multicore Architecture.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Design and Implementation of Multi-Purpose DCT/DST-Specific Accelerator on Heterogeneous Multicore Architecture.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
2017
Evaluation of a Heterogeneous Multicore Architecture by Design and Test of an OFDM Receiver.
IEEE Trans. Parallel Distributed Syst., 2017
Power mitigation of a heterogeneous multicore architecture by frequency scaling in an OFDM receiver test case.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
HW/SW Co-design of an IEEE 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis.
Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017
2015
Design and evaluation of correlation accelerator in IEEE-802.11a/g receiver using a template-based Coarse-Grained Reconfigurable Array.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Implementation of IEEE-802.11a/g receiver blocks on a coarse-grained reconfigurable array.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015