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Sajith Kalathingal

According to our database1, Sajith Kalathingal authored at least 3 papers between 2016 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
DITVA: Dynamic Inter-Thread Vectorization Architecture.
[BibTeX]
[DOI]
Sajith Kalathingal
,
Caroline Collange
,
Bharath Narasimha Swamy
,
André Seznec
J. Parallel Distributed Comput., 2018

2016
Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture. (Transformer le TLP en DLP avec l'architecture de vectorization dynamique inter-thread).
[BibTeX]
[DOI]
Sajith Kalathingal
PhD thesis, 2016

Dynamic Inter-Thread Vectorization Architecture: Extracting DLP from TLP.
[BibTeX]
[DOI]
Sajith Kalathingal
,
Caroline Collange
,
Bharath Narasimha Swamy
,
André Seznec
Proceedings of the 28th International Symposium on Computer Architecture and High Performance Computing, 2016


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