Saiyu Ren

According to our database, Saiyu Ren authored at least 16 papers between 2004 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A 170 MHz to 330 MHz Wideband 90 nm CMOS RC-CR Phase Shifter with Integrated On-Line Amplitude Locked Loop Calibration for Hartley Image Rejection Transceiver.

Xiaomeng Zhang, Shuo Li, Ray Siferd, Saiyu Ren

Circuits Syst. Signal Process., 2021

2019

Low-Cost and High-Performance 8 × 8 Booth Multiplier.

N. V. Vijaya Krishna Boppana, Jeevani Kommareddy, Saiyu Ren

Circuits Syst. Signal Process., 2019

Logistic Function Based Memristor Model With Circuit Application.

Isaac Abraham, Saiyu Ren, Raymond E. Siferd

IEEE Access, 2019

Memristor based multifunction oscillator.

Isaac Abraham, Saiyu Ren

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018

Hardware Trojan detection by timing measurement: Theory and implementation.

Hao Xue, Saiyu Ren

Microelectron. J., 2018

2016

High Frequency Unity Gain Buffer in 90-nm CMOS Technology.

Shuo Li, Xiaomeng Zhang, Saiyu Ren

J. Circuits Syst. Comput., 2016

A Low-Power and Area-Efficient 64-Bit Digital Comparator.

N. V. Vijaya Krishna Boppana, Saiyu Ren

J. Circuits Syst. Comput., 2016

2015

A 1-6 GHz analog radio frequency power driver in 90 nm complementary metal-oxide semiconductor technology for wireless applications.

Saiyu Ren, Isaac Abraham, Seng Hong

Int. J. Circuit Theory Appl., 2015

A 1.1-8.2 GHz tuning range In-phase and Quadrature output DCO design in 90 nm CMOS technology.

Eswar Raju Suraparaju, Pushpak Vasanth Rayudu Arja, Saiyu Ren

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

FPGA design space exploration of IDEA cryptography IP core.

Dinesh Varma Penumetcha, Jiafeng Xie, Saiyu Ren

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2013

Digital Down Converter optimization.

Joe Gerhardt, Saiyu Ren

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Design and implementation of a 16-bit flexible ROM-less direct digital synthesizer.

Sunny Raj Dommaraju, Saiyu Ren, George Y. Lee

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Passive component stacking to aid power supply decoupling.

Christopher Benedik, Saiyu Ren

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2011

CMOS 1.6 GHz Bandwidth 12 Bit Time Interleaved Pipelined ADC.

Saiyu Ren, Ray Siferd

Proceedings of the Eighth International Conference on Information Technology: New Generations, 2011

2009

Performance comparison of two low power wide tuning range VCOs in 90 nm CMOS.

Saiyu Ren, Ray Siferd

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2004

Parallel time interleaved delta sigma band pass analog to digital converter for SOC applications.

Saiyu Ren, Ray Siferd, Robert Blumgold

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004