Sahithi Rampalli
According to our database1,
Sahithi Rampalli
authored at least 6 papers
between 2018 and 2020.
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Bibliography
2020
J. Signal Process. Syst., 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Efficient FPGA Implementation of Conjugate Gradient Methods for Laplacian System using HLS.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019
2018
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths.
CoRR, 2018