Sahand Kashani

Orcid: 0000-0002-6198-4969

According to our database1, Sahand Kashani authored at least 4 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Performance Interfaces for Hardware Accelerators.
Proceedings of the 18th USENIX Symposium on Operating Systems Design and Implementation, 2024

A 475 MHz Manycore FPGA Accelerator for RTL Simulation.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023
Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022


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