Sadok Aouini

Orcid: 0000-0002-6303-705X

According to our database¹, Sadok Aouini authored at least 27 papers between 2006 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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In proceedings

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PhD thesis

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On csauthors.net:

Bibliography

2024

Digital Compensation of Timing Skew Mismatches in Time-Interleaved ADCs by Source Separation.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2024

Digital Compensation of Timing-Skew Mismatches in TI-ADCs by Modulation and Source Separation.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

Utilization of Noise-Shaping in Mixed-Signal Timing-Skew Mismatch Calibration of TI-ADCs.

[BibT_eX]

[DOI]

Hamidreza Mafi

Mohamed Amine Bensenouci

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2022

A Memory-Based Direct-Digital Frequency Synthesizer for Fractional Synchronization.

[BibT_eX]

[DOI]

Sanam Moslemi-Tabrizi

Naim Ben-Hamida

IEEE Trans. Circuits Syst. II Express Briefs, 2022

2021

An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

New Charge-Steering DFEs in 55-nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020

Low-Power Built-in Jitter Injection Using Linearized Phase Interpolator.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2020

Optimized Periodic ΣΔ Bitstreams for DC Signal Generation Used in Dynamic Calibration Applications.

[BibT_eX]

[DOI]

IEEE Open J. Circuits Syst., 2020

Using Optimized Butterworth-Based ΣΔ Bitstreams for the Testing of High-Resolution Data Converters.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Seizure Prediction with a Single iEEG Electrode Using Non-linear Techniques.

[BibT_eX]

[DOI]

Proceedings of the 2020 International Symposium on Networks, Computers and Communications, 2020

2019

Adaptive Coherent Receiver Settings for Optimum Channel Spacing in Gridless Optical Networks.

[BibT_eX]

[DOI]

Future Internet, 2019

Selecting the Fastest Settling-Time Filter in PDM-based DACs used for Dynamic Calibration Applications.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

On the Design of DACs for Dynamic Calibration Applications using Periodic Sequences from ΣΔ Modulators.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019

A 60 GS/s 8-b DAC with > 29.5dB SINAD up to Nyquist frequency in 7nm FinFET CMOS.

[BibT_eX]

[DOI]

Yuriy M. Greshishchev

Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

2018

A coherent subsampling test system arrangement suitable for phase domain measurements.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

New Charge-Steering Latches in 28nm CMOS for Use in High-Speed Wireline Transceivers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Framework for Developping Behavioural Models From Physical Designs.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Microelectronics, 2018

2015

Analysis and Modeling of the Phase Detector Hysteresis in Bang-Bang PLLs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014

Epilepsy seizure prediction using graph theory.

[BibT_eX]

[DOI]

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2013

A programmable analog frequency-locked loop for VCO characterization and test with 8 ppm resolution.

[BibT_eX]

[DOI]

Sadok Aouini

Jean-Francois Bousquet

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Anti-Imaging Time-Mode Filter Design Using a PLL Structure With Transfer Function DFT.

[BibT_eX]

[DOI]

Sadok Aouini

Kun Chuai

Gordon W. Roberts

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

High Speed On-Chip Signal Generation for Debug and Diagnosis.

[BibT_eX]

[DOI]

Tsung-Yen Tsai

Sadok Aouini

Gordon W. Roberts

J. Electron. Test., 2012

2010

A low-cost ATE phase signal generation technique for test applications.

[BibT_eX]

[DOI]

Sadok Aouini

Kun Chuai

Gordon W. Roberts

Proceedings of the 2011 IEEE International Test Conference, 2010

Jitter generation and capture using phase-domain sigma-delta encoding.

[BibT_eX]

[DOI]

Sadok Aouini

Kun Chuai

Gordon W. Roberts

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

Mixed-Signal Production Test: A Measurement Principle Perspective.

[BibT_eX]

[DOI]

Gordon W. Roberts

Sadok Aouini

IEEE Des. Test Comput., 2009

2008

Generating Test Signals for Noise-Based NPR/ACPR Type Tests in Production.

[BibT_eX]

[DOI]

Sadok Aouini

Gordon W. Roberts

Proceedings of the 2008 IEEE International Test Conference, 2008

2006

A Predictable Robust Fully Programmable Analog Gaussian Noise Source for Mixed-Signal/Digital ATE.

[BibT_eX]

[DOI]

Sadok Aouini

Gordon W. Roberts

Proceedings of the 2006 IEEE International Test Conference, 2006

Sadok Aouini

Timeline

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