Sadia Azam

Orcid: 0000-0003-0480-4607

According to our database1, Sadia Azam authored at least 7 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

2023
Verilog-A Implementation of Generic Defect Templates for Analog Fault Injection.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022
Functional Level Abstraction and Simulation of Verilog-AMS Piecewise Linear Models.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Investigation on Realistic Stuck-on/off Defects to Complement IEEE P2427 Draft Standard.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2021
A Common Manipulation Framework for Transistor-Level Languages.
Proceedings of the 24th Forum on specification & Design Languages, 2021

Predictive Fault Grouping based on Faulty AC Matrices.
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

2015
Design Trade off and Performance Analysis of Router Architectures in Network-on-Chip.
Proceedings of the 10th International Conference on Future Networks and Communications (FNC 2015) / The 12th International Conference on Mobile Systems and Pervasive Computing (MobiSPC 2015) / Affiliated Workshops, 2015


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