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Sachin Kumar

Affiliations:
  • Nanyang Technological University, Singapore


According to our database1, Sachin Kumar authored at least 6 papers between 2014 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
A Scaling-Assisted Signed Integer Comparator for the Balanced Five-Moduli Set RNS 2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+ 1, 2<sup>n+1</sup>-1, 2<sup>n-1</sup>-1.
[BibTeX]
[DOI]
Sachin Kumar
,
Chip-Hong Chang
IEEE Trans. Very Large Scale Integr. Syst., 2017

New Algorithm for Signed Integer Comparison in {2<sup>n+k</sup>, 2<sup>n</sup>-1, 2<sup>n</sup>+1, 2<sup>n±1</sup>-1} and Its Efficient Hardware Implementation.
[BibTeX]
[DOI]
Sachin Kumar
,
Chip-Hong Chang
,
Thian Fatt Tay
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016
A New Fast and Area-Efficient Adder-Based Sign Detector for RNS {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1}.
[BibTeX]
[DOI]
Sachin Kumar
,
Chip-Hong Chang
IEEE Trans. Very Large Scale Integr. Syst., 2016

A VLSI-efficient signed magnitude comparator for { 2n-1, 2n, 2n +2n+1-1} RNS.
[BibTeX]
[DOI]
Sachin Kumar
,
Chip-Hong Chang
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A high-speed and area-efficient sign detector for three moduli set RNS {2n, 2n-1, 2n+1}.
[BibTeX]
[DOI]
Sachin Kumar
,
Chip-Hong Chang
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
Area-efficient and fast sign detection for four-moduli set RNS {2<sup>n</sup> -1, 2<sup>n</sup>, 2<sup>n</sup> +1, 22<sup>n</sup> +1}.
[BibTeX]
[DOI]
Chip-Hong Chang
,
Sachin Kumar
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014


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