S. Thyagarajan

According to our database, S. Thyagarajan authored at least 2 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 7GHz High-Bandwidth 1R-1RW SRAM for Arm HPC Processor in 3nm Technology.

R. Mathur, R. Sisodia, A. Chen, A. Singh, S. Thyagarajan, A. Cubeta, C. Andrieux, A. Sowden, Y. K. Chong

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2022

5GHz SRAM for High-Performance Compute Platform in 5nm CMOS.

R. Mathur, M. Kumar, Vivek Asthana, S. Aggarwal, S. Gupta, D. Wanjul, A. Baradia, S. Thota, P. Jain, B. Zheng, A. Cubeta, S. Thyagarajan, A. Chen, Y. K. Chong

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022