S. Simon Wong

According to our database, S. Simon Wong authored at least 41 papers between 1989 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2023

Federated Learning on Heterogenous Data using Chest CT.

Edward H. Lee, Brendan Kelly, Emre Altinmakas, Hakan Dogan, Errol Colak, Steve Fu, Olivia Choudhury, Ujjwal Ratan, Felipe Kitamura, Hernan Chaves, Mourad Said, Eduardo Pontes Reis, Jaekwang Lim, Patricia Yokoo, Corie Mitchell, Jimmy Zheng, Maryam Mohammadzadeh, Golnaz Houshmand, Wendy Qiu, Joel Hayden, Farnaz Rafiee, Chad Klochko, Nicholas Bevins, S. Simon Wong, Safwan Halabi, Kristen W. Yeom

CoRR, 2023

2022

8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory.

Shengjun Qin, Maryann C. Tung, Emma Belliveau, Shuhan Liu, Jimin Kwon, Wei-Chen Chen, Zizhen Jiang, S. Simon Wong, H.-S. Philip Wong

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

Deep COVID DeteCT: an international experience on COVID-19 lung detection and prognosis using chest CT.

Edward H. Lee, Jimmy Zheng, Errol Colak, Maryam Mohammadzadeh, Golnaz Houshmand, Nicholas Bevins, Felipe Kitamura, Emre Altinmakas, Eduardo Pontes Reis, Jae-Kwang Kim, Chad Klochko, Michelle Han, Sadegh Moradian, Ali Mohammadzadeh, Hashem Sharifian, Hassan Hashemi, Kavous Firouznia, Hossein Ghanaati, Masoumeh Gity, Hakan Dogan, Hojjat Salehinejad, Henrique Alves, Jayne Seekins, Nitamar Abdala, Çetin Atasoy, Hamidreza Pouraliakbar, Majid Maleki, S. Simon Wong, Kristen W. Yeom

npj Digit. Medicine, 2021

2017

Fault-Tolerant FPGA with Column-Based Redundancy and Power Gating Using RRAM.

Kibum Lee, S. Simon Wong

IEEE Trans. Computers, 2017

Analysis and Design of a Passive Switched-Capacitor Matrix Multiplier for Approximate Computing.

Edward H. Lee, S. Simon Wong

IEEE J. Solid State Circuits, 2017

LogNet: Energy-efficient neural networks using logarithmic computation.

Edward H. Lee, Daisuke Miyashita, Elaina Chai, Boris Murmann, S. Simon Wong

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

2016

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits.

Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

24.2 A 2.5GHz 7.7TOPS/W switched-capacitor matrix multiplier with co-designed local memory in 40nm.

Edward H. Lee, S. Simon Wong

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

Monolithic 3-D FPGAs.

Zhiping Zhang, Young Yang Liauw, Chen Chen, S. Simon Wong

Proc. IEEE, 2015

Compact One-Transistor-N-RRAM Array Architecture for Advanced CMOS Technology.

Chih-Wei Stanley Yeh, S. Simon Wong

IEEE J. Solid State Circuits, 2015

Factorization for analog-to-digital matrix multiplication.

Edward H. Lee, Madeleine Udell, S. Simon Wong

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

2013

Impact of III-V and Ge Devices on Circuit Performance.

Jeongha Park, Saeroonter Oh, Soyoung Kim, H.-S. Philip Wong, S. Simon Wong

IEEE Trans. Very Large Scale Integr. Syst., 2013

Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array.

Jiale Liang, Chih-Wei Stanley Yeh, S. Simon Wong, H.-S. Philip Wong

ACM J. Emerg. Technol. Comput. Syst., 2013

2012

Nonvolatile 3D-FPGA with monolithically stacked RRAM-based configuration memory.

Young Yang Liauw, Zhiping Zhang, Wanki Kim, Abbas El Gamal, S. Simon Wong

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A 65 nm CMOS fully-integrated dynamic reconfigurable differential power amplifier with high gain in both bands.

Baoyong Chi, Kasra Omid-Zohoor, Zhihua Wang, S. Simon Wong

Microelectron. J., 2011

Array Architecture for a Nonvolatile 3-Dimensional Cross-Point Resistance-Change Memory.

Elaine Ou, S. Simon Wong

IEEE J. Solid State Circuits, 2011

2010

Modeling and analysis of III-V logic FETs for devices and circuits: Sub-22nm technology III-V SRAM cell design.

Saeroonter Oh, Jeongha Park, S. Simon Wong, H.-S. Philip Wong

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009

Optimization of Driver Preemphasis for On-Chip Interconnects.

Yun Bai, S. Simon Wong

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Reduction of Inductive Crosstalk Using Quadrupole Inductors.

Andrew Poon, Andrew Chang, Hirad Samavati, S. Simon Wong

IEEE J. Solid State Circuits, 2009

The prospect of 3D-IC.

S. Simon Wong, Abbas El Gamal

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation.

Hyunwoo Nho, Sei-Seung Yoon, S. Simon Wong, Seong-Ook Jung

IEEE Trans. Circuits Syst. II Express Briefs, 2008

A high-speed, low-power 3D-SRAM architecture.

H. Henry Nho, Mark Horowitz, S. Simon Wong

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

Closed-Form <i>RC</i> and <i>RLC</i> Delay Models Considering Input Rise Time.

So-Young Kim, S. Simon Wong

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Performance Benefits of Monolithically Stacked 3-D FPGA.

Mingjie Lin, Abbas El Gamal, Yi-Chang Lu, S. Simon Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

A Fully Integrated RF Front-End with Independent RX/TX Matching and +20dBm Output Power for WLAN Applications.

Richard Chang, David Weber, MeeLan Lee, David K. Su, Katelijn Vleugels, S. Simon Wong

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

Performance benefits of monolithically stacked 3D-FPGA.

Mingjie Lin, Abbas El Gamal, Yi-Chang Lu, S. Simon Wong

Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

2004

Integrated CMOS transmit-receive switch using LC-tuned substrate bias for 2.4-GHz and 5.2-GHz applications.

Niranjan A. Talwalkar, C. Patrick Yue, Haitao Gan, S. Simon Wong

IEEE J. Solid State Circuits, 2004

2003

A 10-GHz global clock distribution using coupled standing-wave oscillators.

Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong

IEEE J. Solid State Circuits, 2003

Near speed-of-light signaling over on-chip electrical interconnects.

Richard Chang, Niranjan Talwalkar, C. Patrick Yue, S. Simon Wong

IEEE J. Solid State Circuits, 2003

On-Chip Interconnect Inductance - Friend or Foe (Invited).

S. Simon Wong, C. Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O'Mahony

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond.

Soyoung Kim, Yehia Massoud, S. Simon Wong

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Design of a 10GHz clock distribution network using coupled standing-wave oscillators.

Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong

Proceedings of the 40th Design Automation Conference, 2003

2002

A 0-dB IL 2140±30 MHz bandpass filter utilizing Q-enhanced spiral inductors in standard CMOS.

Theerachet Soorapanth, S. Simon Wong

IEEE J. Solid State Circuits, 2002

High-frequency characterization of on-chip digital interconnects.

Bendik Kleveland, Xiaoning Qi, Liam Madden, Takeshi Furusawa, Robert W. Dutton, Mark A. Horowitz, S. Simon Wong

IEEE J. Solid State Circuits, 2002

Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design".

Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong

IEEE J. Solid State Circuits, 2002

2001

Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design.

Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong

IEEE J. Solid State Circuits, 2001

1999

A BiCMOS active substrate probe-card technology for digital testing.

Masoud Zargari, Justin Leung, S. Simon Wong, Bruce A. Wooley

IEEE J. Solid State Circuits, 1999

Design Strategy of On-Chip Inductors for Highly Integrated RF Systems.

C. Patrick Yue, S. Simon Wong

Proceedings of the 36th Conference on Design Automation, 1999

1998

On-chip spiral inductors with patterned ground shields for Si-based RF ICs.

C. Patrick Yue, S. Simon Wong

IEEE J. Solid State Circuits, 1998

1993

Serial-parallel FFT array processor.

Jaehee You, S. Simon Wong

IEEE Trans. Signal Process., 1993

1989

A framework to evaluate technology and device design enhancements for MOS integrated circuits.

Charles G. Sodini, S. Simon Wong, Ping Keung Ko

IEEE J. Solid State Circuits, February, 1989