S. Pae
According to our database1,
S. Pae
authored at least 6 papers
between 2022 and 2024.
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Bibliography
2024
Effect of Off-State Stress on Data-Valid Window Margin for Advanced DRAM Using HK/MG Process Technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2023
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Development and Product Reliability Characterization of Advanced High Speed 14nm DDR5 DRAM with On-die ECC.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Reliability Characterization of HBM featuring $\text{HK}+\text{MG}$ Logic Chip with Multi-stacked DRAMs.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
Transistor Reliability Characterization for Advanced DRAM with HK+MG & EUV process technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2022