S. H. Rasouli

According to our database, S. H. Rasouli authored at least 5 papers between 2003 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Clock Gated Static Pulsed Flip-Flop (CGSPFF) in Sub 100 nm Technology.

A. S. Seyedi, S. H. Rasouli, Amir Amirabadi, Ali Afzali-Kusha

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Low power low leakage clock gated static pulsed flip-flop.

A. S. Seyedi, S. H. Rasouli, Amir Amirabadi, Ali Afzali-Kusha

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Low power and high performance clock delayed domino logic using saturated keeper.

Amir Amirabadi, A. Chehelcheraghi, S. H. Rasouli, A. Seyedi, Ali Afzali-Kusha

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Double edge triggered Feedback Flip-Flop in sub 100NM technology.

S. H. Rasouli, Amir Amirabadi, A. Seyedi, Ali Afzali-Kusha

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2003

No-race charge recycling complementary pass transistor logic (NCRCPL) for low power applications.

Ali Abbasian, S. H. Rasouli, Ali Afzali-Kusha, Mehrdad Nourani

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003